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# Chirp SonicLib
## Summary
Chirp SonicLib is a set of API functions and sensor driver routines designed
to easily control Chirp ultrasonic sensors from an embedded C application. It allows an
application developer to obtain ultrasonic range data from one or more devices, without
needing to develop special low-level code to interact with the sensors directly.
The SonicLib API functions provide a consistent interface for an application to use
Chirp sensors in various situations. This is especially important, because
all Chirp sensors are completely software-defined, including the register map. The
SonicLib interfaces allow an application to use different Chirp sensor firmware images,
without requiring code changes. Only a single initialization parameter must be modified,
and one line added to a header file, to use a new sensor firmware version.
\note All operation of the sensor is controlled through the set of functions, data structures,
and symbolic values defined in the soniclib.h header file. You should not need to modify this file
or the SonicLib functions, or use lower-level internal functions such as described in
the ch_driver.h file. Using any of these non-public methods will reduce your ability to
benefit from future enhancements and releases from Chirp.
## SonicLib API
**The main documentation for the SonicLib API is in the soniclib.h header file.**
That file contains definitions of all public interfaces that applications
use to interact with the sensor.
## Required Board Support Package
SonicLib also defines a set of board support package (BSP) functions that
are specific to the hardware platform being used. The chirp_bsp.h file
contains the definitions of these hardware interfaces. These interfaces
allow the standard SonicLib functions to interact with the peripheral
devices and other resources on the board. The BSP implementation is NOT
part of SonicLib, and must be provided by the developer, board vendor,
or Chirp. Contact Chirp for more information on available BSPs.
## Chirp Driver (internal)
SonicLib includes internal driver functions to interact directly with the sensor.
These modules are distributed as source code, to simplify integration with your embedded
application and for reference only. These functions are described in the ch_driver.h
header file. You should not modify these functions or call them directly from your application.
## Support
support@chirpmicro.com
## Copyright
© Copyright 2016-2021, Chirp Microsystems. All rights reserved.

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/*! \file ch101.h
*
* \brief Internal definitions for the Chirp CH101 ultrasonic sensor.
*
* This file contains various hardware-defined values for the CH101 sensor.
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_H_
#define CH101_H_
#define CH101_DATA_MEM_SIZE 0x800
#define CH101_DATA_MEM_ADDR 0x0200
#define CH101_PROG_MEM_SIZE 0x800
#define CH101_PROG_MEM_ADDR 0xF800
#define CH101_FW_SIZE CH101_PROG_MEM_SIZE
#define CH101_BANDWIDTH_INDEX_1 6 /*!< Index of first sample to use for calculating bandwidth. */
#define CH101_BANDWIDTH_INDEX_2 (CH101_BANDWIDTH_INDEX_1 + 1) /*!< Index of second sample to use for calculating bandwidth. */
#define CH101_SCALEFACTOR_INDEX 4 /*!< Index for calculating scale factor. */
#define CH101_MAX_TICK_INTERVAL 256
#endif

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/*!
* \file ch101_finaltest.h
*
* \brief Internal definitions for the Chirp CH101 Finaltest sensor firmware.
*
* This file contains function definitions, register offsets and other interfaces
* for use with the CH101 Finaltest sensor firmware. Many of these are designed for
* compatibility with the Chirp Finaltest production test system.
* These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220A, Berkeley, CA 94710.
*/
#ifndef CH101_FINALTEST_H_
#define CH101_FINALTEST_H_
#include "ch101.h"
#include "soniclib.h"
#include <stddef.h>
#include <stdint.h>
// finaltest firmware registers
#define CH101_FINALTEST_REG_REGMAPFMT 0x00
#define CH101_FINALTEST_REG_OPMODE 0x01
#define CH101_FINALTEST_REG_TICK_INTERVAL 0x02
#define CH101_FINALTEST_REG_WBCFG 0x04
#define CH101_FINALTEST_REG_PERIOD 0x05
#define CH101_FINALTEST_REG_CAL_TRIG 0x06
#define CH101_FINALTEST_REG_MAX_RANGE 0x07
#define CH101_FINALTEST_REG_DCOSTART 0x08
#define CH101_FINALTEST_REG_CAL_RESULT 0x0A
#define CH101_FINALTEST_REG_DCOSTOP 0x0C
#define CH101_FINALTEST_REG_TXLENGTH 0x0E
#define CH101_FINALTEST_REG_READY 0x0F
#define CH101_FINALTEST_REG_PULSE_WIDTH 0x10
#define CH101_FINALTEST_REG_HOLDOFF 0x11
#define CH101_FINALTEST_REG_THRESHOLD 0x12
#define CH101_FINALTEST_REG_RXQUEUE 0x14
#define CH101_FINALTEST_REG_TOF_SF 0x22
#define CH101_FINALTEST_REG_TOF 0x24
#define CH101_FINALTEST_REG_AMPLITUDE 0x26
#define CH101_FINALTEST_REG_DCOCODE 0x28
#define CH101_FINALTEST_REG_DATA 0x2A
// Maximum number of samples that can be stored; max value of MAX_RANGE
#define CH101_FINALTEST_MAX_SAMPLES 150
// Number of RXQUEUE 16-bit entries
#define CH101_FINALTEST_RXQUEUE_ITEMS 7
// Bit width of each field in RXQUEUE items
#define CH101_FINALTEST_RXQUEUE_BITS_SAMPLES 7
#define CH101_FINALTEST_RXQUEUE_BITS_ATTEN 2
#define CH101_FINALTEST_RXQUEUE_BITS_GAIN 3
// Position of lowest bit in each field of RXQUEUE items
#define CH101_FINALTEST_RXQUEUE_BITPOS_SAMPLES 3
#define CH101_FINALTEST_RXQUEUE_BITPOS_ATTEN (CH101_FINALTEST_RXQUEUE_BITPOS_SAMPLES + CH101_FINALTEST_RXQUEUE_BITS_SAMPLES)
#define CH101_FINALTEST_RXQUEUE_BITPOS_GAIN (CH101_FINALTEST_RXQUEUE_BITPOS_ATTEN + CH101_FINALTEST_RXQUEUE_BITS_ATTEN)
// Values for Rx attenuation IN RXQUEUE items
#define CH101_FINALTEST_RXQUEUE_ATTEN120 0
#define CH101_FINALTEST_RXQUEUE_ATTEN60 1
#define CH101_FINALTEST_RXQUEUE_ATTEN30 2
#define CH101_FINALTEST_RXQUEUE_ATTEN1 3
// Values for Rx gain IN RXQUEUE items
#define CH101_FINALTEST_RXQUEUE_GAIN1P6 0
#define CH101_FINALTEST_RXQUEUE_GAIN3P8 1
#define CH101_FINALTEST_RXQUEUE_GAIN5P7 2
#define CH101_FINALTEST_RXQUEUE_GAIN12P3 3
#define CH101_FINALTEST_RXQUEUE_GAIN25P6 4
// Enumerated values for various registers
#define CH101_FINALTEST_OPMODE_IDLE 0x00
#define CH101_FINALTEST_OPMODE_FREERUN 0x02
#define CH101_FINALTEST_OPMODE_TRIGGERED 0x10
#define CH101_FINALTEST_OPMODE_RX_ONLY 0x20
#define CH101_FINALTEST_PERIOD_IDLE 0
#define CH101_FINALTEST_TICK_INTERVAL_IDLE 2048
#define CH101_FINALTEST_READY_NOTLOCKED 0x00
#define CH101_FINALTEST_READY_NOTREADY 0x01
#define CH101_FINALTEST_READY_FREQ_LOCKED_BM 0x04
// ASIC firmware linkage
extern const char *ch101_finaltest_version; // version string in fw .c file
extern const uint8_t ch101_finaltest_fw[CH101_FW_SIZE];
const unsigned char * get_ram_ch101_finaltest_init_ptr(void);
uint16_t get_ch101_finaltest_fw_ram_init_addr(void);
uint16_t get_ch101_finaltest_fw_ram_init_size(void);
uint8_t ch101_finaltest_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index);
typedef enum { // XXX redundant definition from soniclib.h to resolve circular #include's
CH101_FINALTEST_RANGE_ECHO_ONE_WAY = 0, /*!< One way - gets full pulse/echo distance & divides by 2. */
CH101_FINALTEST_RANGE_ECHO_ROUND_TRIP = 1, /*!< Round trip - full pulse/echo distance. */
CH101_FINALTEST_RANGE_DIRECT = 2, /*!< Direct - for receiving node in pitch-catch mode. */
} ch101_finaltest_range_t;
/*!
* \brief Write an entry into the receive settings queue
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
* \param queue_index which position in the queue to write this item
* \param samples sample count for which these settings will be in effect, Range of values 1-127
* \param attenuation Range of values 0-3, see Final Test interface description
* \param gain Range of values 0-4, see Final Test interface description
*/
uint8_t ch101_finaltest_set_rxqueue_item( ch_dev_t* dev_ptr, uint8_t queue_index,
uint8_t samples, uint8_t attenuation, uint8_t gain );
/*!
* \brief Configure threshold of detection.
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
* \param threshold minimum received echo intensity for detecting a target
*
* \return 0 if successful.
*/
uint8_t ch101_finaltest_set_threshold(ch_dev_t *dev_ptr, uint16_t threshold);
uint32_t ch101_finaltest_get_range(ch_dev_t *dev_ptr, ch101_finaltest_range_t range_type);
/*!
* \brief Gets measured amplitude from the sensor.
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
*
* This function reads back the amplitude from the sensor. The amplitude is representative of the incoming sound pressure.
*
* \return Amplitude (arbitrary units).
*/
uint16_t ch101_finaltest_get_amplitude(ch_dev_t *dev_ptr);
/*!
* \brief Reads IQ data from sensor and places it into specified buffer.
* \param dev_ptr Pointer to the ch_dev_t device descriptor
* \param buf_ptr Buffer to which to store IQ data
* \param start_sample starting sample of requested I/Q data
* \param num_samples number of samples to return I/Q for
* \param mode I/O mode - must be CH_IO_MODE_BLOCK
* \return 0 on success, nonzero on failure
*/
uint8_t ch101_finaltest_get_iq_data(ch_dev_t *dev_ptr, uint8_t /*ch_iq_sample_t*/ *buf_ptr, uint16_t start_sample, uint16_t num_samples,
uint8_t /*ch_io_mode_t*/ mode);
/*!
* \brief Check if the sensor has completed its start-up calibration (locking) procedure.
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
*
* \return 1 if the sensor is locked, 0 otherwise.
*/
uint8_t ch101_finaltest_get_locked_state(ch_dev_t *dev_ptr);
void ch101_finaltest_store_pt_result(ch_dev_t *dev_ptr);
void ch101_finaltest_store_op_freq(ch_dev_t *dev_ptr);
void ch101_finaltest_store_bandwidth(ch_dev_t *dev_ptr);
void ch101_finaltest_store_scale_factor(ch_dev_t *dev_ptr);
int ch101_finaltest_set_pulse_width(ch_dev_t *dev_ptr,uint8_t pulse_width);
int ch101_finaltest_set_tx_length(ch_dev_t *dev_ptr, uint8_t tx_length);
uint32_t ch101_finaltest_get_op_freq(ch_dev_t *dev_ptr);
#endif /* CH101_FINALTEST_H_ */

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/*! \file ch101_floor.h
*
* \brief Internal definitions for the Chirp CH101 Floor Detection enabled firmware
*
* This file contains register offsets and other values for use with the CH101 Floor
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_FLOOR_H_
#define CH101_FLOOR_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_FLOOR_REG_OPMODE 0x01
#define CH101_FLOOR_REG_TICK_INTERVAL 0x02
#define CH101_FLOOR_REG_RX_WIN_END 0x04
#define CH101_FLOOR_REG_PERIOD 0x05
#define CH101_FLOOR_REG_CAL_TRIG 0x06
#define CH101_FLOOR_REG_MAX_RANGE 0x07
#define CH101_FLOOR_REG_CALC 0x08
#define CH101_FLOOR_REG_RX_GAIN_ATTEN_1 0x10
#define CH101_FLOOR_REG_RX_HOLDOFF 0x11
#define CH101_FLOOR_REG_RX_GAIN_ATTEN_2 0x12
#define CH101_FLOOR_REG_READY 0x14
#define CH101_FLOOR_REG_TOF_SF 0x16
#define CH101_FLOOR_REG_AMPLITUDE_LOW 0x18
#define CH101_FLOOR_REG_AMPLITUDE_HIGH 0x1A
#define CH101_FLOOR_REG_CAL_RESULT 0x0A
#define CH101_FLOOR_REG_DATA 0x1C
#define CH101_FLOOR_MAX_SAMPLES (150)
extern const char *ch101_floor_version; // version string in fw .c file
extern const uint8_t ch101_floor_fw[CH101_FW_SIZE];
uint16_t get_ch101_floor_fw_ram_init_addr(void);
uint16_t get_ch101_floor_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_floor_init_ptr(void);
uint8_t ch101_floor_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gppc.h
*
* \brief Internal definitions for the Chirp CH101 GPPC sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPPC
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPPC_H_
#define CH101_GPPC_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPPC firmware registers */
#define CH101_GPPC_REG_OPMODE 0x01
#define CH101_GPPC_REG_TICK_INTERVAL 0x02
#define CH101_GPPC_REG_I2C_READ_OFFSET 0x04
#define CH101_GPPC_REG_PERIOD 0x05
#define CH101_GPPC_REG_CAL_TRIG 0x06
#define CH101_GPPC_REG_MAX_RANGE 0x07
#define CH101_GPPC_REG_TX_LENGTH 0x08
#define CH101_GPPC_REG_CAL_RESULT 0x0A
#define CH101_GPPC_REG_DCO_SET 0x0C
#define CH101_GPPC_REG_THRESHOLD 0x0E
#define CH101_GPPC_REG_TX_BITS 0x10
#define CH101_GPPC_REG_RX_HOLDOFF 0x11
#define CH101_GPPC_REG_ST_COEFF 0x13
#define CH101_GPPC_REG_READY 0x14
#define CH101_GPPC_REG_BIT_LENGTH 0x15
#define CH101_GPPC_REG_TOF_SF 0x16
#define CH101_GPPC_REG_TOF 0x18
#define CH101_GPPC_REG_AMPLITUDE 0x1A
#define CH101_GPPC_REG_RX_PULSE_LENGTH 0x1C
#define CH101_GPPC_REG_DATA 0x1E
#define CH101_GPPC_MAX_SAMPLES (350)
#define CH101_GPPC_READY_FREQ_LOCKED (0x04)
#define CH101_GPPC_THRESHOLD_NUMBER 1
#define CH_SF_LOCK_FOUND (0)
#define CH_SF_LOCK_START (1)
#define CH_DCO_LOW 100
#define CH_DCO_HIGH 250
#define CH_DCO_SEARCH_THRESHOLD 100 //Hz, if error is above this, do a search
#define DEBUG_DCO_SEARCH(X) X
//#define DEBUG_DCO_SEARCH(X)
/* signal modulation */
#define CH_TXMOD_DATA_MAX (31) /* max value of the modulated Tx data set by users*/
#define MAX_NUM_OF_MOD_DATA (8) /* max number of modulated data */
#define MAX_FUDGE_FACTOR (5)
#define CH_PARITY_BIT (5) /* parity bit of Tx bits */
#define CH_TXBITS_BITMASK (0x40) /* bit mask for Tx bits */
#define CH_RXDEMOD_DATA_BITMASK (0x1F) /* bit mask for demodulated RX data */
extern const char *ch101_gppc_version; // version string in fw .c file
extern const uint8_t ch101_gppc_fw[CH101_FW_SIZE];
uint16_t get_ch101_gppc_fw_ram_init_addr(void);
uint16_t get_ch101_gppc_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gppc_init_ptr(void);
uint8_t ch101_gppc_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
uint32_t ch101_gppc_set_new_dco_code(ch_dev_t *dev_ptr, uint16_t dcocode);
uint8_t ch101_gppc_set_frequency(ch_dev_t *dev_ptr, uint32_t target_freq_Hz);
#endif

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/*! \file ch101_gpr.h
*
* \brief Internal definitions for the Chirp CH101 GPR sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPR
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220A, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_H_
#define CH101_GPR_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_REG_OPMODE 0x01
#define CH101_GPR_REG_TICK_INTERVAL 0x02
#define CH101_GPR_REG_PERIOD 0x05
#define CH101_GPR_REG_CAL_TRIG 0x06
#define CH101_GPR_REG_CAL_TRIG 0x06
#define CH101_GPR_REG_MAX_RANGE 0x07
#define CH101_GPR_REG_CALC 0x08
#define CH101_GPR_REG_REV_CYCLES 0x0C
#define CH101_GPR_REG_DCO_PERIOD 0x0E
#define CH101_GPR_REG_ST_RANGE 0x12
#define CH101_GPR_REG_READY 0x14
#define CH101_GPR_REG_TOF_SF 0x16
#define CH101_GPR_REG_TOF 0x18
#define CH101_GPR_REG_AMPLITUDE 0x1A
#define CH101_GPR_REG_CAL_RESULT 0x0A
#define CH101_GPR_REG_DATA 0x1C
#define CH101_GPR_MAX_SAMPLES (225)
extern const char *ch101_gpr_version; // version string in fw .c file
extern const uint8_t ch101_gpr_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_init_ptr(void);
uint8_t ch101_gpr_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_narrow.h
*
* \brief Internal definitions for the Chirp CH101 GPR Narrow-FoV sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPR
* Narrow-FoV sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220A, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_NARROW_H_
#define CH101_GPR_NARROW_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_NARROW_REG_OPMODE 0x01
#define CH101_GPR_NARROW_REG_TICK_INTERVAL 0x02
#define CH101_GPR_NARROW_REG_PERIOD 0x05
#define CH101_GPR_NARROW_REG_CAL_TRIG 0x06
#define CH101_GPR_NARROW_REG_CAL_TRIG 0x06
#define CH101_GPR_NARROW_REG_MAX_RANGE 0x07
#define CH101_GPR_NARROW_REG_CALC 0x08
#define CH101_GPR_NARROW_REG_REV_CYCLES 0x0C
#define CH101_GPR_NARROW_REG_DCO_PERIOD 0x0E
#define CH101_GPR_NARROW_REG_ST_RANGE 0x12
#define CH101_GPR_NARROW_REG_READY 0x14
#define CH101_GPR_NARROW_REG_TOF_SF 0x16
#define CH101_GPR_NARROW_REG_TOF 0x18
#define CH101_GPR_NARROW_REG_AMPLITUDE 0x1A
#define CH101_GPR_NARROW_REG_CAL_RESULT 0x0A
#define CH101_GPR_NARROW_REG_DATA 0x1C
#define CH101_GPR_NARROW_MAX_SAMPLES (225)
extern const char *ch101_gpr_narrow_version; // version string in fw .c file
extern const uint8_t ch101_gpr_narrow_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_narrow_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_narrow_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_narrow_init_ptr(void);
uint8_t ch101_gpr_narrow_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
void ch101_gpr_narrow_store_pt_result(ch_dev_t *dev_ptr);
#endif

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/*! \file ch101_gpr_narrow_wd.h
*
* \brief Internal definitions for the Chirp CH101 GPR Narrow-FoV sensor firmware. (watchdog enabled)
*
* This file contains register offsets and other values for use with the CH101 GPR
* Narrow-FoV sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220A, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_NARROW_WD_H_
#define CH101_GPR_NARROW_WD_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_NARROW_WD_REG_OPMODE 0x01
#define CH101_GPR_NARROW_WD_REG_TICK_INTERVAL 0x02
#define CH101_GPR_NARROW_WD_REG_PERIOD 0x05
#define CH101_GPR_NARROW_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_NARROW_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_NARROW_WD_REG_MAX_RANGE 0x07
#define CH101_GPR_NARROW_WD_REG_CALC 0x08
#define CH101_GPR_NARROW_WD_REG_REV_CYCLES 0x0C
#define CH101_GPR_NARROW_WD_REG_DCO_PERIOD 0x0E
#define CH101_GPR_NARROW_WD_REG_ST_RANGE 0x12
#define CH101_GPR_NARROW_WD_REG_READY 0x14
#define CH101_GPR_NARROW_WD_REG_TOF_SF 0x16
#define CH101_GPR_NARROW_WD_REG_TOF 0x18
#define CH101_GPR_NARROW_WD_REG_AMPLITUDE 0x1A
#define CH101_GPR_NARROW_WD_REG_CAL_RESULT 0x0A
#define CH101_GPR_NARROW_WD_REG_DATA 0x1C
#define CH101_GPR_NARROW_WD_MAX_SAMPLES (225)
extern const char *ch101_gpr_narrow_wd_version; // version string in fw .c file
extern const uint8_t ch101_gpr_narrow_wd_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_narrow_wd_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_narrow_wd_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_narrow_wd_init_ptr(void);
uint8_t ch101_gpr_narrow_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
void ch101_gpr_narrow_wd_store_pt_result(ch_dev_t *dev_ptr);
#endif

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/*! \file ch101_gpr_open.h
*
* \brief Internal definitions for the Chirp CH101 GPR Open sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPR Open
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2019, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_OPEN_H_
#define CH101_GPR_OPEN_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_OPEN_REG_OPMODE 0x01
#define CH101_GPR_OPEN_REG_TICK_INTERVAL 0x02
#define CH101_GPR_OPEN_REG_PERIOD 0x05
#define CH101_GPR_OPEN_REG_CAL_TRIG 0x06
#define CH101_GPR_OPEN_REG_CAL_TRIG 0x06
#define CH101_GPR_OPEN_REG_MAX_RANGE 0x07
#define CH101_GPR_OPEN_REG_CALC 0x08
#define CH101_GPR_OPEN_REG_ST_RANGE 0x12
#define CH101_GPR_OPEN_REG_READY 0x14
#define CH101_GPR_OPEN_REG_TOF_SF 0x16
#define CH101_GPR_OPEN_REG_TOF 0x18
#define CH101_GPR_OPEN_REG_AMPLITUDE 0x1A
#define CH101_GPR_OPEN_REG_CAL_RESULT 0x0A
#define CH101_GPR_OPEN_REG_DATA 0x1C
#define CH101_GPR_OPEN_CTR (0x2B368)
#define CH101_GPR_OPEN_MAX_SAMPLES (150)
extern const char *ch101_gpr_open_version; // version string in fw .c file
extern const uint8_t ch101_gpr_open_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_open_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_open_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_open_init_ptr(void);
uint8_t ch101_gpr_open_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
void ch101_gpr_open_store_pt_result(ch_dev_t *dev_ptr);
#endif

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/*! \file ch101_gpr_rxopt.h
*
* \brief Internal definitions for the Chirp CH101 GPR Rx-optimized sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPR
* Rx-optimized sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_RXOPT_H_
#define CH101_GPR_RXOPT_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR Rx-optimized firmware registers */
#define CH101_GPR_RXOPT_REG_OPMODE 0x01
#define CH101_GPR_RXOPT_REG_TICK_INTERVAL 0x02
#define CH101_GPR_RXOPT_REG_PERIOD 0x05
#define CH101_GPR_RXOPT_REG_CAL_TRIG 0x06
#define CH101_GPR_RXOPT_REG_MAX_RANGE 0x07
#define CH101_GPR_RXOPT_REG_CALC 0x08
#define CH101_GPR_RXOPT_REG_CAL_RESULT 0x0A
#define CH101_GPR_RXOPT_REG_REV_CYCLES 0x0C
#define CH101_GPR_RXOPT_REG_DCO_PERIOD 0x0E
#define CH101_GPR_RXOPT_REG_ST_RANGE 0x12
#define CH101_GPR_RXOPT_REG_READY 0x14
#define CH101_GPR_RXOPT_REG_TOF_SF 0x16
#define CH101_GPR_RXOPT_REG_TOF 0x18
#define CH101_GPR_RXOPT_REG_AMPLITUDE 0x1A
#define CH101_GPR_RXOPT_REG_DATA 0x1C
#define CH101_GPR_RXOPT_MAX_SAMPLES (225)
extern const char *ch101_gpr_rxopt_version; // version string in fw .c file
extern const uint8_t ch101_gpr_rxopt_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_rxopt_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_rxopt_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_rxopt_init_ptr(void);
uint8_t ch101_gpr_rxopt_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_rxopt_narrow.h
*
* \brief Internal definitions for the Chirp CH101 GPR Rx-optimized sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPR
* Rx-optimized sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_RXOPT_NARROW_H_
#define CH101_GPR_RXOPT_NARROW_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR Rx-optimized firmware registers */
#define CH101_GPR_RXOPT_NARROW_REG_OPMODE 0x01
#define CH101_GPR_RXOPT_NARROW_REG_TICK_INTERVAL 0x02
#define CH101_GPR_RXOPT_NARROW_REG_PERIOD 0x05
#define CH101_GPR_RXOPT_NARROW_REG_CAL_TRIG 0x06
#define CH101_GPR_RXOPT_NARROW_REG_MAX_RANGE 0x07
#define CH101_GPR_RXOPT_NARROW_REG_CALC 0x08
#define CH101_GPR_RXOPT_NARROW_REG_CAL_RESULT 0x0A
#define CH101_GPR_RXOPT_NARROW_REG_REV_CYCLES 0x0C
#define CH101_GPR_RXOPT_NARROW_REG_DCO_PERIOD 0x0E
#define CH101_GPR_RXOPT_NARROW_REG_ST_RANGE 0x12
#define CH101_GPR_RXOPT_NARROW_REG_READY 0x14
#define CH101_GPR_RXOPT_NARROW_REG_TOF_SF 0x16
#define CH101_GPR_RXOPT_NARROW_REG_TOF 0x18
#define CH101_GPR_RXOPT_NARROW_REG_AMPLITUDE 0x1A
#define CH101_GPR_RXOPT_NARROW_REG_DATA 0x1C
#define CH101_GPR_RXOPT_NARROW_MAX_SAMPLES (225)
extern const char *ch101_gpr_rxopt_narrow_version; // version string in fw .c file
extern const uint8_t ch101_gpr_rxopt_narrow_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_rxopt_narrow_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_rxopt_narrow_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_rxopt_narrow_init_ptr(void);
uint8_t ch101_gpr_rxopt_narrow_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_rxopt_narrow_wd.h
*
* \brief Internal definitions for the Chirp CH101 GPR Rx-optimized sensor firmware. (watchdog enabled)
*
* This file contains register offsets and other values for use with the CH101 GPR
* Rx-optimized sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_RXOPT_NARROW_WD_H_
#define CH101_GPR_RXOPT_NARROW_WD_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR Rx-optimized firmware registers */
#define CH101_GPR_RXOPT_NARROW_WD_REG_OPMODE 0x01
#define CH101_GPR_RXOPT_NARROW_WD_REG_TICK_INTERVAL 0x02
#define CH101_GPR_RXOPT_NARROW_WD_REG_PERIOD 0x05
#define CH101_GPR_RXOPT_NARROW_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_RXOPT_NARROW_WD_REG_MAX_RANGE 0x07
#define CH101_GPR_RXOPT_NARROW_WD_REG_CALC 0x08
#define CH101_GPR_RXOPT_NARROW_WD_REG_CAL_RESULT 0x0A
#define CH101_GPR_RXOPT_NARROW_WD_REG_REV_CYCLES 0x0C
#define CH101_GPR_RXOPT_NARROW_WD_REG_DCO_PERIOD 0x0E
#define CH101_GPR_RXOPT_NARROW_WD_REG_ST_RANGE 0x12
#define CH101_GPR_RXOPT_NARROW_WD_REG_READY 0x14
#define CH101_GPR_RXOPT_NARROW_WD_REG_TOF_SF 0x16
#define CH101_GPR_RXOPT_NARROW_WD_REG_TOF 0x18
#define CH101_GPR_RXOPT_NARROW_WD_REG_AMPLITUDE 0x1A
#define CH101_GPR_RXOPT_NARROW_WD_REG_DATA 0x1C
#define CH101_GPR_RXOPT_NARROW_WD_MAX_SAMPLES (225)
extern const char *ch101_gpr_rxopt_narrow_wd_version; // version string in fw .c file
extern const uint8_t ch101_gpr_rxopt_narrow_wd_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_rxopt_narrow_wd_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_rxopt_narrow_wd_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_rxopt_narrow_wd_init_ptr(void);
uint8_t ch101_gpr_rxopt_narrow_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_rxopt_wd.h
*
* \brief Internal definitions for the Chirp CH101 GPR Rx-optimized sensor firmware. (watchdog enabled)
*
* This file contains register offsets and other values for use with the CH101 GPR
* Rx-optimized sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_RXOPT_WD_H_
#define CH101_GPR_RXOPT_WD_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR Rx-optimized firmware registers */
#define CH101_GPR_RXOPT_WD_REG_OPMODE 0x01
#define CH101_GPR_RXOPT_WD_REG_TICK_INTERVAL 0x02
#define CH101_GPR_RXOPT_WD_REG_PERIOD 0x05
#define CH101_GPR_RXOPT_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_RXOPT_WD_REG_MAX_RANGE 0x07
#define CH101_GPR_RXOPT_WD_REG_CALC 0x08
#define CH101_GPR_RXOPT_WD_REG_CAL_RESULT 0x0A
#define CH101_GPR_RXOPT_WD_REG_REV_CYCLES 0x0C
#define CH101_GPR_RXOPT_WD_REG_DCO_PERIOD 0x0E
#define CH101_GPR_RXOPT_WD_REG_ST_RANGE 0x12
#define CH101_GPR_RXOPT_WD_REG_READY 0x14
#define CH101_GPR_RXOPT_WD_REG_TOF_SF 0x16
#define CH101_GPR_RXOPT_WD_REG_TOF 0x18
#define CH101_GPR_RXOPT_WD_REG_AMPLITUDE 0x1A
#define CH101_GPR_RXOPT_WD_REG_DATA 0x1C
#define CH101_GPR_RXOPT_WD_MAX_SAMPLES (225)
extern const char *ch101_gpr_rxopt_wd_version; // version string in fw .c file
extern const uint8_t ch101_gpr_rxopt_wd_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_rxopt_wd_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_rxopt_wd_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_rxopt_wd_init_ptr(void);
uint8_t ch101_gpr_rxopt_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_sr.h
*
* \brief Internal definitions for the Chirp CH101 GPR Short-range sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPR Short-range
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_SR_H_
#define CH101_GPR_SR_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_SR_REG_OPMODE 0x01
#define CH101_GPR_SR_REG_TICK_INTERVAL 0x02
#define CH101_GPR_SR_REG_PERIOD 0x05
#define CH101_GPR_SR_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_REG_MAX_RANGE 0x07
#define CH101_GPR_SR_REG_CALC 0x08
#define CH101_GPR_SR_REG_REV_CYCLES 0x0C
#define CH101_GPR_SR_REG_DCO_PERIOD 0x0E
#define CH101_GPR_SR_REG_ST_RANGE 0x12
#define CH101_GPR_SR_REG_READY 0x14
#define CH101_GPR_SR_REG_TOF_SF 0x16
#define CH101_GPR_SR_REG_TOF 0x18
#define CH101_GPR_SR_REG_AMPLITUDE 0x1A
#define CH101_GPR_SR_REG_CAL_RESULT 0x0A
#define CH101_GPR_SR_REG_DATA 0x1C
#define CH101_GPR_SR_MAX_SAMPLES (225)
extern const char *ch101_gpr_sr_version; // version string in fw .c file
extern const uint8_t ch101_gpr_sr_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_sr_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_sr_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_sr_init_ptr(void);
uint8_t ch101_gpr_sr_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr,
uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_sr_narrow.h
*
* \brief Internal definitions for the Chirp CH101 GPR Short-range Narrow-FoV sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPR Short-range
* Narrow-FoV sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_SR_NARROW_H_
#define CH101_GPR_SR_NARROW_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_SR_NARROW_REG_OPMODE 0x01
#define CH101_GPR_SR_NARROW_REG_TICK_INTERVAL 0x02
#define CH101_GPR_SR_NARROW_REG_PERIOD 0x05
#define CH101_GPR_SR_NARROW_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_NARROW_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_NARROW_REG_MAX_RANGE 0x07
#define CH101_GPR_SR_NARROW_REG_CALC 0x08
#define CH101_GPR_SR_NARROW_REG_REV_CYCLES 0x0C
#define CH101_GPR_SR_NARROW_REG_DCO_PERIOD 0x0E
#define CH101_GPR_SR_NARROW_REG_ST_RANGE 0x12
#define CH101_GPR_SR_NARROW_REG_READY 0x14
#define CH101_GPR_SR_NARROW_REG_TOF_SF 0x16
#define CH101_GPR_SR_NARROW_REG_TOF 0x18
#define CH101_GPR_SR_NARROW_REG_AMPLITUDE 0x1A
#define CH101_GPR_SR_NARROW_REG_CAL_RESULT 0x0A
#define CH101_GPR_SR_NARROW_REG_DATA 0x1C
#define CH101_GPR_SR_NARROW_MAX_SAMPLES (225)
extern const char *ch101_gpr_sr_narrow_version; // version string in fw .c file
extern const uint8_t ch101_gpr_sr_narrow_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_sr_narrow_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_sr_narrow_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_sr_narrow_init_ptr(void);
uint8_t ch101_gpr_sr_narrow_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr,
uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_sr_narrow_wd.h
*
* \brief Internal definitions for the Chirp CH101 GPR Short-range Narrow-FoV sensor firmware. (watchdog enabled)
*
* This file contains register offsets and other values for use with the CH101 GPR Short-range
* Narrow-FoV sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_SR_NARROW_WD_H_
#define CH101_GPR_SR_NARROW_WD_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_SR_NARROW_WD_REG_OPMODE 0x01
#define CH101_GPR_SR_NARROW_WD_REG_TICK_INTERVAL 0x02
#define CH101_GPR_SR_NARROW_WD_REG_PERIOD 0x05
#define CH101_GPR_SR_NARROW_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_NARROW_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_NARROW_WD_REG_MAX_RANGE 0x07
#define CH101_GPR_SR_NARROW_WD_REG_CALC 0x08
#define CH101_GPR_SR_NARROW_WD_REG_REV_CYCLES 0x0C
#define CH101_GPR_SR_NARROW_WD_REG_DCO_PERIOD 0x0E
#define CH101_GPR_SR_NARROW_WD_REG_ST_RANGE 0x12
#define CH101_GPR_SR_NARROW_WD_REG_READY 0x14
#define CH101_GPR_SR_NARROW_WD_REG_TOF_SF 0x16
#define CH101_GPR_SR_NARROW_WD_REG_TOF 0x18
#define CH101_GPR_SR_NARROW_WD_REG_AMPLITUDE 0x1A
#define CH101_GPR_SR_NARROW_WD_REG_CAL_RESULT 0x0A
#define CH101_GPR_SR_NARROW_WD_REG_DATA 0x1C
#define CH101_GPR_SR_NARROW_WD_MAX_SAMPLES (225)
extern const char *ch101_gpr_sr_narrow_wd_version; // version string in fw .c file
extern const uint8_t ch101_gpr_sr_narrow_wd_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_sr_narrow_wd_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_sr_narrow_wd_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_sr_narrow_wd_init_ptr(void);
uint8_t ch101_gpr_sr_narrow_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr,
uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_sr_open.h
*
* \brief Internal definitions for the Chirp CH101 GPR Short-range Open sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 GPR Short-rangeOpen
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2019, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_SR_OPEN_H_
#define CH101_GPR_SR_OPEN_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_SR_OPEN_REG_OPMODE 0x01
#define CH101_GPR_SR_OPEN_REG_TICK_INTERVAL 0x02
#define CH101_GPR_SR_OPEN_REG_PERIOD 0x05
#define CH101_GPR_SR_OPEN_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_OPEN_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_OPEN_REG_MAX_RANGE 0x07
#define CH101_GPR_SR_OPEN_REG_CALC 0x08
#define CH101_GPR_SR_OPEN_REG_ST_RANGE 0x12
#define CH101_GPR_SR_OPEN_REG_READY 0x14
#define CH101_GPR_SR_OPEN_REG_TOF_SF 0x16
#define CH101_GPR_SR_OPEN_REG_TOF 0x18
#define CH101_GPR_SR_OPEN_REG_AMPLITUDE 0x1A
#define CH101_GPR_SR_OPEN_REG_CAL_RESULT 0x0A
#define CH101_GPR_SR_OPEN_REG_DATA 0x1C
#define CH101_GPR_SR_OPEN_CTR (0x2B368)
#define CH101_GPR_SR_OPEN_MAX_SAMPLES (150)
extern const char *ch101_gpr_sr_open_version; // version string in fw .c file
extern const uint8_t ch101_gpr_sr_open_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_sr_open_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_sr_open_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_sr_open_init_ptr(void);
uint8_t ch101_gpr_sr_open_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr,
uint8_t dev_num, uint8_t i2c_bus_index);
void ch101_gpr_sr_open_store_pt_result(ch_dev_t *dev_ptr);
#endif

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/*! \file ch101_gpr_sr_wd.h
*
* \brief Internal definitions for the Chirp CH101 GPR Short-range sensor firmware. (watchdog enabled)
*
* This file contains register offsets and other values for use with the CH101 GPR Short-range
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_SR_WD_H_
#define CH101_GPR_SR_WD_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_SR_WD_REG_OPMODE 0x01
#define CH101_GPR_SR_WD_REG_TICK_INTERVAL 0x02
#define CH101_GPR_SR_WD_REG_PERIOD 0x05
#define CH101_GPR_SR_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_SR_WD_REG_MAX_RANGE 0x07
#define CH101_GPR_SR_WD_REG_CALC 0x08
#define CH101_GPR_SR_WD_REG_REV_CYCLES 0x0C
#define CH101_GPR_SR_WD_REG_DCO_PERIOD 0x0E
#define CH101_GPR_SR_WD_REG_ST_RANGE 0x12
#define CH101_GPR_SR_WD_REG_READY 0x14
#define CH101_GPR_SR_WD_REG_TOF_SF 0x16
#define CH101_GPR_SR_WD_REG_TOF 0x18
#define CH101_GPR_SR_WD_REG_AMPLITUDE 0x1A
#define CH101_GPR_SR_WD_REG_CAL_RESULT 0x0A
#define CH101_GPR_SR_WD_REG_DATA 0x1C
#define CH101_GPR_SR_WD_MAX_SAMPLES (225)
extern const char *ch101_gpr_sr_wd_version; // version string in fw .c file
extern const uint8_t ch101_gpr_sr_wd_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_sr_wd_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_sr_wd_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_sr_wd_init_ptr(void);
uint8_t ch101_gpr_sr_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr,
uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_gpr_wd.h
*
* \brief Internal definitions for the Chirp CH101 GPR sensor firmware. (watchdog enabled)
*
* This file contains register offsets and other values for use with the CH101 GPR
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220A, Berkeley, CA 94710.
*/
#ifndef CH101_GPR_WD_H_
#define CH101_GPR_WD_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_GPR_WD_REG_OPMODE 0x01
#define CH101_GPR_WD_REG_TICK_INTERVAL 0x02
#define CH101_GPR_WD_REG_PERIOD 0x05
#define CH101_GPR_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_WD_REG_CAL_TRIG 0x06
#define CH101_GPR_WD_REG_MAX_RANGE 0x07
#define CH101_GPR_WD_REG_CALC 0x08
#define CH101_GPR_WD_REG_REV_CYCLES 0x0C
#define CH101_GPR_WD_REG_DCO_PERIOD 0x0E
#define CH101_GPR_WD_REG_ST_RANGE 0x12
#define CH101_GPR_WD_REG_READY 0x14
#define CH101_GPR_WD_REG_TOF_SF 0x16
#define CH101_GPR_WD_REG_TOF 0x18
#define CH101_GPR_WD_REG_AMPLITUDE 0x1A
#define CH101_GPR_WD_REG_CAL_RESULT 0x0A
#define CH101_GPR_WD_REG_DATA 0x1C
#define CH101_GPR_WD_MAX_SAMPLES (225)
extern const char *ch101_gpr_wd_version; // version string in fw .c file
extern const uint8_t ch101_gpr_wd_fw[CH101_FW_SIZE];
uint16_t get_ch101_gpr_wd_fw_ram_init_addr(void);
uint16_t get_ch101_gpr_wd_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_gpr_wd_init_ptr(void);
uint8_t ch101_gpr_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_liquid.h
*
* \brief Internal definitions for the Chirp CH101 Liquid Level Sensing enabled firmware
*
* This file contains register offsets and other values for use with the CH101 Liquid
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2021, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_LIQUID_H_
#define CH101_LIQUID_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR firmware registers */
#define CH101_LIQUID_REG_OPMODE 0x01
#define CH101_LIQUID_REG_TICK_INTERVAL 0x02
#define CH101_LIQUID_REG_RX_WIN_END 0x04
#define CH101_LIQUID_REG_PERIOD 0x05
#define CH101_LIQUID_REG_CAL_TRIG 0x06
#define CH101_LIQUID_REG_MAX_RANGE 0x07
#define CH101_LIQUID_REG_CALC 0x08
#define CH101_LIQUID_REG_RX_GAIN_ATTEN_1 0x10
#define CH101_LIQUID_REG_RX_HOLDOFF 0x11
#define CH101_LIQUID_REG_RX_GAIN_ATTEN_2 0x12
#define CH101_LIQUID_REG_READY 0x14
#define CH101_LIQUID_REG_TOF_SF 0x16
#define CH101_LIQUID_REG_AMPLITUDE_LOW 0x18
#define CH101_LIQUID_REG_AMPLITUDE_HIGH 0x1A
#define CH101_LIQUID_REG_CAL_RESULT 0x0A
#define CH101_LIQUID_REG_DATA 0x1C
#define CH101_LIQUID_MAX_SAMPLES (225)
extern const char *ch101_liquid_version; // version string in fw .c file
extern const uint8_t ch101_liquid_fw[CH101_FW_SIZE];
uint16_t get_ch101_liquid_fw_ram_init_addr(void);
uint16_t get_ch101_liquid_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_liquid_init_ptr(void);
uint8_t ch101_liquid_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch101_sonicsync.h
*
* \brief Internal definitions for the Chirp CH101 SonicSync sensor firmware.
*
* This file contains register offsets and other values for use with the CH101 SonicSync
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2019, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH101_SONICSYNC_H_
#define CH101_SONICSYNC_H_
#include "ch101.h"
#include "soniclib.h"
#include <stdint.h>
/* SmartSonic SonicSync firmware registers */
#define CH101_SONICSYNC_REG_OPMODE 0x01
#define CH101_SONICSYNC_REG_TICK_INTERVAL 0x02
#define CH101_SONICSYNC_REG_PERIOD 0x05
#define CH101_SONICSYNC_REG_MAX_RANGE 0x07
#define CH101_SONICSYNC_REG_TIME_PLAN 0x09
#define CH101_SONICSYNC_REG_STAT_RANGE 0x12
#define CH101_SONICSYNC_REG_STAT_COEFF 0x13
#define CH101_SONICSYNC_REG_READY 0x14
#define CH101_SONICSYNC_REG_TOF_SF 0x16
#define CH101_SONICSYNC_REG_TOF 0x18
#define CH101_SONICSYNC_REG_AMPLITUDE 0x1A
#define CH101_SONICSYNC_REG_CAL_TRIG 0x06
#define CH101_SONICSYNC_REG_CAL_RESULT 0x0A
#define CH101_SONICSYNC_REG_DATA 0x1C
#define CH101_SONICSYNC_MAX_SAMPLES (150)
#define CH101_SONICSYNC_READY_FREQ_LOCKED (0x02 | 0x04)
extern const char * ch101_sonicsync_master_version; // version string in fw .c file
extern const char * ch101_sonicsync_slave_version; // version string in fw .c file
extern const uint8_t ch101_sonicsync_master_fw[CH101_FW_SIZE];
extern const uint8_t ch101_sonicsync_slave_fw[CH101_FW_SIZE];
uint16_t get_ch101_sonicsync_master_fw_ram_init_addr(void);
uint16_t get_ch101_sonicsync_master_fw_ram_init_size(void);
uint16_t get_ch101_sonicsync_slave_fw_ram_init_addr(void);
uint16_t get_ch101_sonicsync_slave_fw_ram_init_size(void);
const unsigned char * get_ram_ch101_sonicsync_master_init_ptr(void);
const unsigned char * get_ram_ch101_sonicsync_slave_init_ptr(void);
uint8_t ch101_sonicsync_master_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
uint8_t ch101_sonicsync_slave_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
uint8_t ch_sonicsync_get_locked_state(ch_dev_t *dev_ptr);
#endif

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/*! \file ch201.h
*
* \brief Internal definitions for the Chirp CH201 ultrasonic sensor.
*
* This file contains various hardware-defined values for the CH201 sensor.
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH201_H_
#define CH201_H_
#define CH201_DATA_MEM_SIZE 0x800
#define CH201_DATA_MEM_ADDR 0x0200
#define CH201_PROG_MEM_SIZE 0x800
#define CH201_PROG_MEM_ADDR 0xF800
#define CH201_FW_SIZE CH201_PROG_MEM_SIZE
#define CH201_BANDWIDTH_INDEX_1 6 /*!< Index of first sample to use for calculating bandwidth. */
#define CH201_BANDWIDTH_INDEX_2 (CH201_BANDWIDTH_INDEX_1 + 1) /*!< Index of second sample to use for calculating bandwidth. */
#define CH201_SCALEFACTOR_INDEX 4 /*!< Index for calculating scale factor. */
#define CH201_MAX_TICK_INTERVAL 256
#endif

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/*!
* \file ch201_finaltest.h
*
* \brief Internal definitions for the Chirp CH201 Finaltest sensor firmware.
*
* This file contains function definitions, register offsets and other interfaces
* for use with the CH201 Finaltest sensor firmware. Many of these are designed for
* compatibility with the Chirp Finaltest production test system.
* These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220A, Berkeley, CA 94710.
*/
#ifndef CH201_FINALTEST_H_
#define CH201_FINALTEST_H_
#include "ch201.h"
#include "soniclib.h"
#include <stddef.h>
#include <stdint.h>
#define CH201_FINALTEST_REG_REGMAPFMT 0x00
#define CH201_FINALTEST_REG_OPMODE 0x01
#define CH201_FINALTEST_REG_TICK_INTERVAL 0x02
#define CH201_FINALTEST_REG_WBCFG 0x04
#define CH201_FINALTEST_REG_PERIOD 0x05
#define CH201_FINALTEST_REG_CAL_TRIG 0x06
#define CH201_FINALTEST_REG_MAX_RANGE 0x07
#define CH201_FINALTEST_REG_DCOSTART 0x08
#define CH201_FINALTEST_REG_CAL_RESULT 0x0A
#define CH201_FINALTEST_REG_DCOSTOP 0x0C
#define CH201_FINALTEST_REG_TXLENGTH 0x0E
#define CH201_FINALTEST_REG_READY 0x0F
#define CH201_FINALTEST_REG_PULSE_WIDTH 0x10
#define CH201_FINALTEST_REG_HOLDOFF 0x11
#define CH201_FINALTEST_REG_THRESHOLD 0x12
#define CH201_FINALTEST_REG_RXQUEUE 0x14
#define CH201_FINALTEST_REG_TOF_SF 0x22
#define CH201_FINALTEST_REG_TOF 0x24
#define CH201_FINALTEST_REG_AMPLITUDE 0x26
#define CH201_FINALTEST_REG_DCOCODE 0x28
#define CH201_FINALTEST_REG_DATA 0x2A
// Maximum number of samples that can be stored; max value of MAX_RANGE
#define CH201_FINALTEST_MAX_SAMPLES 450
// Number of RXQUEUE 16-bit entries
#define CH201_FINALTEST_RXQUEUE_ITEMS 7
// Bit width of each field in RXQUEUE items
#define CH201_FINALTEST_RXQUEUE_BITS_SAMPLES 7
#define CH201_FINALTEST_RXQUEUE_BITS_ATTEN 2
#define CH201_FINALTEST_RXQUEUE_BITS_GAIN 3
// Position of lowest bit in each field of RXQUEUE items
#define CH201_FINALTEST_RXQUEUE_BITPOS_SAMPLES 3
#define CH201_FINALTEST_RXQUEUE_BITPOS_ATTEN (CH201_FINALTEST_RXQUEUE_BITPOS_SAMPLES + CH201_FINALTEST_RXQUEUE_BITS_SAMPLES)
#define CH201_FINALTEST_RXQUEUE_BITPOS_GAIN (CH201_FINALTEST_RXQUEUE_BITPOS_ATTEN + CH201_FINALTEST_RXQUEUE_BITS_ATTEN )
// Values for Rx attenuation IN RXQUEUE items
#define CH201_FINALTEST_RXQUEUE_ATTEN120 0
#define CH201_FINALTEST_RXQUEUE_ATTEN60 1
#define CH201_FINALTEST_RXQUEUE_ATTEN30 2
#define CH201_FINALTEST_RXQUEUE_ATTEN1 3
// Values for Rx gain IN RXQUEUE items
#define CH201_FINALTEST_RXQUEUE_GAIN1P6 0
#define CH201_FINALTEST_RXQUEUE_GAIN3P8 1
#define CH201_FINALTEST_RXQUEUE_GAIN5P7 2
#define CH201_FINALTEST_RXQUEUE_GAIN12P3 3
#define CH201_FINALTEST_RXQUEUE_GAIN25P6 4
// Enumerated values for various registers
#define CH201_FINALTEST_OPMODE_IDLE 0x00
#define CH201_FINALTEST_OPMODE_FREERUN 0x02
#define CH201_FINALTEST_OPMODE_TRIGGERED 0x10
#define CH201_FINALTEST_OPMODE_RX_ONLY 0x20
#define CH201_FINALTEST_PERIOD_IDLE 0
#define CH201_FINALTEST_TICK_INTERVAL_IDLE 2048
#define CH201_FINALTEST_READY_NOTLOCKED 0x00
#define CH201_FINALTEST_READY_NOTREADY 0x01
#define CH201_FINALTEST_READY_FREQ_LOCKED_BM 0x04
// ASIC firmware linkage
extern const char *ch201_finaltest_version; // version string in fw .c file
extern const uint8_t ch201_finaltest_fw[CH201_FW_SIZE];
const unsigned char * get_ram_ch201_finaltest_init_ptr(void);
uint16_t get_ch201_finaltest_fw_ram_init_addr(void);
uint16_t get_ch201_finaltest_fw_ram_init_size(void);
uint8_t ch201_finaltest_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index);
typedef enum { // XXX redundant definition from soniclib.h to resolve circular #include's
CH201_FINALTEST_RANGE_ECHO_ONE_WAY = 0, /*!< One way - gets full pulse/echo distance & divides by 2. */
CH201_FINALTEST_RANGE_ECHO_ROUND_TRIP = 1, /*!< Round trip - full pulse/echo distance. */
CH201_FINALTEST_RANGE_DIRECT = 2, /*!< Direct - for receiving node in pitch-catch mode. */
} ch201_finaltest_range_t;
/*!
* \brief Write an entry into the receive settings queue
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
* \param queue_index which position in the queue to write this item
* \param samples sample count for which these settings will be in effect, Range of values 1-127
* \param attenuation Range of values 0-3, see Final Test interface description
* \param gain Range of values 0-4, see Final Test interface description
*/
uint8_t ch201_finaltest_set_rxqueue_item( ch_dev_t* dev_ptr, uint8_t queue_index,
uint8_t samples, uint8_t attenuation, uint8_t gain );
/*!
* \brief Set the MAX_RANGE register directly.
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
* \param samples Value to write to MAX_RANGE register, determining length of data used in target detection
*
* \return 0 if successful
*/
uint8_t ch201_finaltest_set_samples( ch_dev_t* dev_ptr, uint8_t samples );
uint8_t ch201_finaltest_set_max_range(ch_dev_t *dev_ptr, uint16_t max_range_mm);
/*!
* \brief Configure threshold of detection.
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
* \param threshold minimum received echo intensity for detecting a target
*
* \return 0 if successful.
*/
uint8_t ch201_finaltest_set_threshold(ch_dev_t *dev_ptr, uint16_t threshold);
/*!
* \brief Configure target detection holdoff.
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
* \param holdoff number of samples to discard before starting target detection
*
* \return 0 if successful.
*/
uint8_t ch201_finaltest_set_holdoff(ch_dev_t *dev_ptr, uint8_t holdoff);
uint32_t ch201_finaltest_get_range(ch_dev_t *dev_ptr, ch201_finaltest_range_t range_type);
/*!
* \brief Gets measured intensity from the sensor.
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
*
* This function reads back the amplitude from the sensor. The intensity is representative of the incoming sound pressure.
*
* \return Amplitude (arbitrary units).
*/
uint16_t ch201_finaltest_get_amplitude(ch_dev_t *dev_ptr);
/*!
* \brief Reads IQ data from sensor and places it into specified buffer.
* \param dev_ptr Pointer to the ch_dev_t device descriptor
* \param buf_ptr Buffer to which to store IQ data
* \param start_sample starting sample of requested I/Q data
* \param num_samples number of samples to return I/Q for
* \param mode I/O mode - must be CH_IO_MODE_BLOCK
* \return 0 on success, nonzero on failure
*/
uint8_t ch201_finaltest_get_iq_data(ch_dev_t *dev_ptr, uint8_t /*ch_iq_sample_t*/ *buf_ptr, uint16_t start_sample, uint16_t num_samples,
uint8_t /*ch_io_mode_t*/ mode);
/*!
* \brief Check if the sensor has completed its start-up calibration (locking) procedure.
*
* \param dev_ptr a pointer to the ch_dev_t device descriptor
*
* \return 1 if the sensor is locked, 0 otherwise.
*/
uint8_t ch201_finaltest_get_locked_state(ch_dev_t *dev_ptr);
void ch201_finaltest_prepare_pulse_timer(ch_dev_t *dev_ptr);
void ch201_finaltest_store_pt_result(ch_dev_t *dev_ptr);
void ch201_finaltest_store_op_freq(ch_dev_t *dev_ptr);
void ch201_finaltest_store_bandwidth(ch_dev_t *dev_ptr);
void ch201_finaltest_store_scale_factor(ch_dev_t *dev_ptr);
int ch201_finaltest_set_pulse_width(ch_dev_t *dev_ptr,uint8_t pulse_width);
int ch201_finaltest_set_tx_length(ch_dev_t *dev_ptr, uint8_t tx_length);
uint32_t ch201_finaltest_get_op_freq(ch_dev_t *dev_ptr);
#endif /* CH201_FINALTEST_H_ */

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/*! \file ch201_gprmt.h
*
* \brief Internal definitions for the Chirp CH201 GPR Multi-threshold sensor firmware.
*
* This file contains register offsets and other values for use with the CH201 GPR
* Multi-threshold sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH201_GPRMT_H_
#define CH201_GPRMT_H_
#include "ch201.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR with multi thresholds firmware registers */
#define CH201_GPRMT_REG_OPMODE 0x01
#define CH201_GPRMT_REG_TICK_INTERVAL 0x02
#define CH201_GPRMT_REG_LOW_GAIN_RXLEN 0x04
#define CH201_GPRMT_REG_PERIOD 0x05
#define CH201_GPRMT_REG_CAL_TRIG 0x06
#define CH201_GPRMT_REG_MAX_RANGE 0x07
#define CH201_GPRMT_REG_THRESH_LEN_0 0x08
#define CH201_GPRMT_REG_THRESH_LEN_1 0x09
#define CH201_GPRMT_REG_CAL_RESULT 0x0A
#define CH201_GPRMT_REG_THRESH_LEN_2 0x0C
#define CH201_GPRMT_REG_THRESH_LEN_3 0x0D
#define CH201_GPRMT_REG_TX_LENGTH 0x10
#define CH201_GPRMT_REG_ST_RANGE 0x12
#define CH201_GPRMT_REG_READY 0x14
#define CH201_GPRMT_REG_THRESH_LEN_4 0x15
#define CH201_GPRMT_REG_THRESHOLDS 0x16 // start of array of six 2-byte threshold levels
#define CH201_GPRMT_REG_TOF_SF 0x22
#define CH201_GPRMT_REG_TOF 0x24
#define CH201_GPRMT_REG_AMPLITUDE 0x26
#define CH201_GPRMT_REG_DATA 0x28
#define CH201_GPRMT_MAX_SAMPLES (450) // max number of samples
#define CH201_GPRMT_NUM_THRESHOLDS (6) // total number of thresholds
extern const char *ch201_gprmt_version; // version string in fw .c file
extern const uint8_t ch201_gprmt_fw[CH201_FW_SIZE];
uint16_t get_ch201_gprmt_fw_ram_init_addr(void);
uint16_t get_ch201_gprmt_fw_ram_init_size(void);
const unsigned char * get_ram_ch201_gprmt_init_ptr(void);
uint8_t ch201_gprmt_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch201_gprmt_wd.h
*
* \brief Internal definitions for the Chirp CH201 GPR Multi-threshold sensor firmware. (watchdog enabled)
*
* This file contains register offsets and other values for use with the CH201 GPR
* Multi-threshold sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH201_GPRMT_WD_H_
#define CH201_GPRMT_WD_H_
#include "ch201.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR with multi thresholds firmware registers */
#define CH201_GPRMT_WD_REG_OPMODE 0x01
#define CH201_GPRMT_WD_REG_TICK_INTERVAL 0x02
#define CH201_GPRMT_WD_REG_PERIOD 0x05
#define CH201_GPRMT_WD_REG_CAL_TRIG 0x06
#define CH201_GPRMT_WD_REG_MAX_RANGE 0x07
#define CH201_GPRMT_WD_REG_THRESH_LEN_0 0x08
#define CH201_GPRMT_WD_REG_THRESH_LEN_1 0x09
#define CH201_GPRMT_WD_REG_CAL_RESULT 0x0A
#define CH201_GPRMT_WD_REG_THRESH_LEN_2 0x0C
#define CH201_GPRMT_WD_REG_THRESH_LEN_3 0x0D
#define CH201_GPRMT_WD_REG_ST_RANGE 0x12
#define CH201_GPRMT_WD_REG_READY 0x14
#define CH201_GPRMT_WD_REG_THRESH_LEN_4 0x15
#define CH201_GPRMT_WD_REG_THRESHOLDS 0x16 // start of array of six 2-byte threshold levels
#define CH201_GPRMT_WD_REG_TOF_SF 0x22
#define CH201_GPRMT_WD_REG_TOF 0x24
#define CH201_GPRMT_WD_REG_AMPLITUDE 0x26
#define CH201_GPRMT_WD_REG_DATA 0x28
#define CH201_GPRMT_WD_MAX_SAMPLES (450) // max number of samples
#define CH201_GPRMT_WD_NUM_THRESHOLDS (6) // total number of thresholds
extern const char *ch201_gprmt_wd_version; // version string in fw .c file
extern const uint8_t ch201_gprmt_wd_fw[CH201_FW_SIZE];
uint16_t get_ch201_gprmt_wd_fw_ram_init_addr(void);
uint16_t get_ch201_gprmt_wd_fw_ram_init_size(void);
const unsigned char * get_ram_ch201_gprmt_wd_init_ptr(void);
uint8_t ch201_gprmt_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch201_gprstr.h
*
* \brief Internal definitions for the Chirp CH201 GPR Static Target Rejection sensor firmware.
*
* This file contains register offsets and other values for use with the CH201 GPR
* Static Target Rejection sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH201_GPRSTR_H_
#define CH201_GPRSTR_H_
#include "ch201.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR with STR firmware registers */
#define CH201_GPRSTR_REG_OPMODE 0x01
#define CH201_GPRSTR_REG_TICK_INTERVAL 0x02
#define CH201_GPRSTR_REG_LOW_GAIN_RXLEN 0x04
#define CH201_GPRSTR_REG_PERIOD 0x05
#define CH201_GPRSTR_REG_CAL_TRIG 0x06
#define CH201_GPRSTR_REG_MAX_RANGE 0x07
#define CH201_GPRSTR_REG_INTCFG 0x08
#define CH201_GPRSTR_REG_CAL_RESULT 0x0A
#define CH201_GPRSTR_REG_THRESH_1 0x0C
#define CH201_GPRSTR_REG_THRESH_0 0x0E
#define CH201_GPRSTR_REG_TX_LENGTH 0x10
#define CH201_GPRSTR_REG_RX_HOLDOFF 0x11
#define CH201_GPRSTR_REG_STAT_RANGE 0x12
#define CH201_GPRSTR_REG_STAT_COEFF 0x13
#define CH201_GPRSTR_REG_READY 0x14
#define CH201_GPRSTR_REG_TOF_SF 0x16
#define CH201_GPRSTR_REG_TOF 0x18
#define CH201_GPRSTR_REG_AMPLITUDE 0x1A
#define CH201_GPRSTR_REG_DATA 0x1C
#define CH201_GPRSTR_MAX_SAMPLES (290)
#define CH201_GPRSTR_NUM_THRESHOLDS (2)
#define CH201_GPRSTR_STAT_COEFF_DEFAULT (6) // default value for stationary target coefficient
#define CH201_GPRSTR_MIN_STR_SAMPLES (14) // min number of STR samples, to provide ringdown filter
extern const char *ch201_gprstr_version; // version string in fw .c file
extern const uint8_t ch201_gprstr_fw[CH201_FW_SIZE];
uint16_t get_ch201_gprstr_fw_ram_init_addr(void);
uint16_t get_ch201_gprstr_fw_ram_init_size(void);
const unsigned char * get_ram_ch201_gprstr_init_ptr(void);
uint8_t ch201_gprstr_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch201_gprstr_wd.h
*
* \brief Internal definitions for the Chirp CH201 GPR Static Target Rejection sensor firmware. (watchdog enabled)
*
* This file contains register offsets and other values for use with the CH201 GPR
* Static Target Rejection sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH201_GPRSTR_WD_H_
#define CH201_GPRSTR_WD_H_
#include "ch201.h"
#include "soniclib.h"
#include <stdint.h>
/* GPR with STR firmware registers (watchdog enabled) */
#define CH201_GPRSTR_WD_REG_OPMODE 0x01
#define CH201_GPRSTR_WD_REG_TICK_INTERVAL 0x02
#define CH201_GPRSTR_WD_REG_LOW_GAIN_RXLEN 0x04
#define CH201_GPRSTR_WD_REG_PERIOD 0x05
#define CH201_GPRSTR_WD_REG_CAL_TRIG 0x06
#define CH201_GPRSTR_WD_REG_MAX_RANGE 0x07
#define CH201_GPRSTR_WD_REG_INTCFG 0x08
#define CH201_GPRSTR_WD_REG_CAL_RESULT 0x0A
#define CH201_GPRSTR_WD_REG_THRESH_1 0x0C
#define CH201_GPRSTR_WD_REG_THRESH_0 0x0E
#define CH201_GPRSTR_WD_REG_TX_LENGTH 0x10
#define CH201_GPRSTR_WD_REG_RX_HOLDOFF 0x11
#define CH201_GPRSTR_WD_REG_STAT_RANGE 0x12
#define CH201_GPRSTR_WD_REG_STAT_COEFF 0x13
#define CH201_GPRSTR_WD_REG_READY 0x14
#define CH201_GPRSTR_WD_REG_TOF_SF 0x16
#define CH201_GPRSTR_WD_REG_TOF 0x18
#define CH201_GPRSTR_WD_REG_AMPLITUDE 0x1A
#define CH201_GPRSTR_WD_REG_DATA 0x1C
#define CH201_GPRSTR_WD_MAX_SAMPLES (290)
#define CH201_GPRSTR_WD_NUM_THRESHOLDS (2)
#define CH201_GPRSTR_WD_STAT_COEFF_DEFAULT (6) // default value for stationary target coefficient
#define CH201_GPRSTR_WD_MIN_STR_SAMPLES (14) // min number of STR samples, to provide ringdown filter
extern const char *ch201_gprstr_wd_version; // version string in fw .c file
extern const uint8_t ch201_gprstr_wd_fw[CH201_FW_SIZE];
uint16_t get_ch201_gprstr_wd_fw_ram_init_addr(void);
uint16_t get_ch201_gprstr_wd_fw_ram_init_size(void);
const unsigned char * get_ram_ch201_gprstr_wd_init_ptr(void);
uint8_t ch201_gprstr_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
#endif

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/*! \file ch201_presence.h
*
* \brief Internal definitions for the Chirp CH201 presence detection sensor firmware.
*
* This file contains register offsets and other values for use with the CH201 presence
* sensor firmware. These values are subject to change without notice.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH201_PRESENCE_H_
#define CH201_PRESENCE_H_
#include <stdint.h>
#include "ch201.h"
#include "soniclib.h"
/* Presence detection firmware registers */
#define CH201_PRESENCE_REG_OPMODE (0x01)
#define CH201_PRESENCE_REG_TICK_INTERVAL (0x02)
#define CH201_PRESENCE_REG_LOW_GAIN_RXLEN (0x04)
#define CH201_PRESENCE_REG_PERIOD (0x05)
#define CH201_PRESENCE_REG_CAL_TRIG (0x06)
#define CH201_PRESENCE_REG_MAX_RANGE (0x07)
#define CH201_PRESENCE_REG_THRESH_LEN_0 (0x08)
#define CH201_PRESENCE_REG_THRESH_LEN_1 (0x09)
#define CH201_PRESENCE_REG_CAL_RESULT (0x0A)
#define CH201_PRESENCE_REG_THRESH_LEN_2 (0x0C)
#define CH201_PRESENCE_REG_THRESH_LEN_3 (0x0D)
#define CH201_PRESENCE_REG_TX_LENGTH (0x10)
#define CH201_PRESENCE_PMUTRINGLENGTH (0x12)
#define CH201_PRESENCE_DECIMATION (0x13)
#define CH201_PRESENCE_REG_READY (0x14)
#define CH201_PRESENCE_REG_THRESH_LEN_4 (0x15)
#define CH201_PRESENCE_REG_THRESHOLDS (0x16) // start of array of six 2-byte threshold levels
#define CH201_PRESENCE_REG_TOF_SF (0x22)
#define CH201_PRESENCE_REG_TOF (0x24)
#define CH201_PRESENCE_REG_AMPLITUDE (0x26)
#define CH201_PRESENCE_REG_DATA (0x28)
#define CH201_PRESENCE_MAX_SAMPLES (300) // max number of samples
#define CH201_PRESENCE_NUM_THRESHOLDS (6) // total number of thresholds
// Enumerated values for various registers
#define CH201_PRESENCE_DECIMATION_MASK (0x03)
#define CH201_PRESENCE_DECIMATION_NO (0x00)
#define CH201_PRESENCE_DECIMATION_2 (0x01)
#define CH201_PRESENCE_DECIMATION_3 (0x02)
#define CH201_PRESENCE_DECIMATION_4 (0x03)
#define CH201_PRESENCE_CORDIC_MASK (0x80)
#define CH201_PRESENCE_CORDIC_EN (0x80)
#define CH201_PRESENCE_CORDIC_DIS (0x00)
#define CH201_PRESENCE_READY_FREQ_LOCKED (0x04)
#define CH201_PRESENCE_FREQCOUNTERCYCLES (1150)
extern const char *ch201_presence_version; // version string in fw .c file
extern const uint8_t ch201_presence_fw[CH201_FW_SIZE];
uint16_t get_ch201_presence_fw_ram_init_addr(void);
uint16_t get_ch201_presence_fw_ram_init_size(void);
const unsigned char * get_ram_ch201_presence_init_ptr(void);
uint8_t ch201_presence_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
uint8_t ch201_presence_set_decimation(ch_dev_t *dev_ptr, uint8_t decimation);
uint8_t ch201_presence_enable_cordic(ch_dev_t *dev_ptr, uint8_t enable);
#endif

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/*! \file ch_common.h
*
* \brief Internal driver functions for operation with the Chirp ultrasonic sensor.
*
* This file contains common implementations of sensor support routines. These are
* suitable for use with most standard sensor firmware images. The firmware-specific
* init function will set up various function pointers to either the common implementations
* in this file, or corresponding firmware-specific implementations.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH_COMMON_H_
#define CH_COMMON_H_
#include "soniclib.h"
#include <stdint.h>
/* CH-x01 common definitions */
#define CH_COMMON_BANDWIDTH_INDEX_1 6 // first sample of BIST data for b/w calc
#define CH_COMMON_BANDWIDTH_INDEX_2 7 // second sample of BIST data for b/w calc
/* CH-101 common definitions */
#define CH101_COMMON_REG_OPMODE 0x01
#define CH101_COMMON_REG_TICK_INTERVAL 0x02
#define CH101_COMMON_REG_PERIOD 0x05
#define CH101_COMMON_REG_CAL_TRIG 0x06
#define CH101_COMMON_REG_MAX_RANGE 0x07
#define CH101_COMMON_REG_TIME_PLAN 0x09
#define CH101_COMMON_REG_CAL_RESULT 0x0A
#define CH101_COMMON_REG_REV_CYCLES 0x0C
#define CH101_COMMON_REG_DCO_PERIOD 0x0E
#define CH101_COMMON_REG_RX_HOLDOFF 0x11
#define CH101_COMMON_REG_STAT_RANGE 0x12
#define CH101_COMMON_REG_STAT_COEFF 0x13
#define CH101_COMMON_REG_READY 0x14
#define CH101_COMMON_REG_TOF_SF 0x16
#define CH101_COMMON_REG_TOF 0x18
#define CH101_COMMON_REG_AMPLITUDE 0x1A
#define CH101_COMMON_REG_DATA 0x1C
#define CH101_COMMON_I2CREGS_OFFSET 0
#define CH101_COMMON_READY_FREQ_LOCKED (0x02) // XXX need more values (?)
#define CH101_COMMON_FREQCOUNTERCYCLES (128)
#define CH101_COMMON_STAT_COEFF_DEFAULT (6) // default value for stationary target coefficient
#define CH101_COMMON_NUM_THRESHOLDS (6) // total number of thresholds
/* CH-201 common definitions */
#define CH201_COMMON_REG_OPMODE 0x01
#define CH201_COMMON_REG_TICK_INTERVAL 0x02
#define CH201_COMMON_REG_LOW_GAIN_RXLEN 0x04
#define CH201_COMMON_REG_PERIOD 0x05
#define CH201_COMMON_REG_CAL_TRIG 0x06
#define CH201_COMMON_REG_MAX_RANGE 0x07
#define CH201_COMMON_REG_THRESH_LEN_0 0x08
#define CH201_COMMON_REG_THRESH_LEN_1 0x09
#define CH201_COMMON_REG_CAL_RESULT 0x0A
#define CH201_COMMON_REG_THRESH_LEN_2 0x0C
#define CH201_COMMON_REG_THRESH_LEN_3 0x0D
#define CH201_COMMON_REG_TX_LENGTH 0x10
#define CH201_COMMON_REG_RX_HOLDOFF 0x11
#define CH201_COMMON_REG_ST_RANGE 0x12
#define CH201_COMMON_REG_READY 0x14
#define CH201_COMMON_REG_THRESH_LEN_4 0x15
#define CH201_COMMON_REG_THRESHOLDS 0x16 // start of array of six 2-byte threshold levels
#define CH201_COMMON_REG_TOF_SF 0x22
#define CH201_COMMON_REG_TOF 0x24
#define CH201_COMMON_REG_AMPLITUDE 0x26
#define CH201_COMMON_REG_DATA 0x28
#define CH201_COMMON_I2CREGS_OFFSET 0
#define CH201_COMMON_READY_FREQ_LOCKED (0x02) // XXX need more values (?)
#define CH201_COMMON_FREQCOUNTERCYCLES (128)
#define CH201_COMMON_NUM_THRESHOLDS (6) // total number of thresholds
/* Function prototypes */
uint8_t ch_common_set_mode(ch_dev_t *dev_ptr, ch_mode_t mode);
uint8_t ch_common_fw_load(ch_dev_t *dev_ptr);
uint8_t ch_common_set_sample_interval(ch_dev_t *dev_ptr, uint16_t interval_ms);
uint8_t ch_common_set_num_samples( ch_dev_t* dev_ptr, uint16_t num_samples );
uint8_t ch_common_set_max_range(ch_dev_t *dev_ptr, uint16_t max_range_mm);
uint8_t ch_common_set_static_range(ch_dev_t *dev_ptr, uint16_t samples);
uint32_t ch_common_get_range(ch_dev_t *dev_ptr, ch_range_t range_type);
uint16_t ch_common_get_amplitude(ch_dev_t *dev_ptr);
uint8_t ch_common_get_locked_state(ch_dev_t *dev_ptr);
uint32_t ch_common_get_op_freq(ch_dev_t *dev_ptr);
void ch_common_prepare_pulse_timer(ch_dev_t *dev_ptr);
void ch_common_store_pt_result(ch_dev_t *dev_ptr);
void ch_common_store_op_freq(ch_dev_t *dev_ptr);
void ch_common_store_bandwidth(ch_dev_t *dev_ptr);
void ch_common_store_scale_factor(ch_dev_t *dev_ptr);
uint8_t ch_common_set_thresholds(ch_dev_t *dev_ptr, ch_thresholds_t *thresholds_ptr);
uint8_t ch_common_get_thresholds(ch_dev_t *dev_ptr, ch_thresholds_t *thresholds_ptr);
uint16_t ch_common_mm_to_samples(ch_dev_t *dev_ptr, uint16_t num_mm);
uint16_t ch_common_samples_to_mm(ch_dev_t *dev_ptr, uint16_t num_samples);
uint8_t ch_common_get_iq_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples, ch_io_mode_t nonblock);
uint8_t ch_common_set_sample_window(ch_dev_t *dev_ptr, uint16_t start_sample, uint16_t end_sample);
uint8_t ch_common_set_time_plan(ch_dev_t *dev_ptr, ch_time_plan_t time_plan);
ch_time_plan_t ch_common_get_time_plan(ch_dev_t *dev_ptr);
uint16_t ch_common_get_amplitude_avg(ch_dev_t *dev_ptr);
uint8_t ch_common_get_amplitude_data(ch_dev_t *dev_ptr, uint16_t *buf_ptr, uint16_t start_sample, uint16_t num_samples,
ch_io_mode_t mode);
uint8_t ch_common_set_rx_holdoff(ch_dev_t *dev_ptr, uint16_t rx_holdoff);
uint16_t ch_common_get_rx_holdoff(ch_dev_t *dev_ptr);
uint8_t ch_common_set_rx_low_gain(ch_dev_t *dev_ptr, uint16_t num_samples);
uint16_t ch_common_get_rx_low_gain(ch_dev_t *dev_ptr);
uint8_t ch_common_set_tx_length(ch_dev_t *dev_ptr, uint8_t num_cycles);
uint8_t ch_common_get_tx_length(ch_dev_t *dev_ptr);
uint8_t ch_common_set_cal_result(ch_dev_t *dev_ptr, ch_cal_result_t *cal_ptr);
uint8_t ch_common_get_cal_result(ch_dev_t *dev_ptr, ch_cal_result_t *cal_ptr);
#endif /* CH_COMMON_H_ */

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/*! \file ch_driver.h
*
* \brief Internal driver functions for operation with the Chirp ultrasonic sensor.
*
* This file contains definitions for the internal Chirp sensor driver functions
* and structures within SonicLib. These functions are provided in source code form
* to simplify integration with an embedded application and for reference only.
*
* The Chirp driver functions provide an interface between the SonicLib public API
* layer and the actual sensor devices. The driver manages all software-defined
* aspects of the Chirp sensor, including the register set.
*
* You should not need to edit this file or call the driver functions directly. Doing so
* will reduce your ability to benefit from future enhancements and releases from Chirp.
*
*/
/*
* Copyright <20> 2016-2020, Chirp Microsystems. All rights reserved.
*
* Chirp Microsystems CONFIDENTIAL
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You can contact the authors of this program by email at support@chirpmicro.com
* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#ifndef CH_DRIVER_H_
#define CH_DRIVER_H_
//#define CHDRV_DEBUG
#include "chirp_board_config.h"
#include "soniclib.h"
#include <stdint.h>
#include <stdlib.h>
#include <math.h>
#include <string.h>
#ifdef CHDRV_DEBUG
#include <stdio.h>
#endif
#define CHDRV_I2C_MAX_WRITE_BYTES 256 /*!< maximum number of bytes in a single I2C write */
#define CHDRV_NB_TRANS_TYPE_STD (0) /*!< standard non-blocking I/O transaction */
#define CHDRV_NB_TRANS_TYPE_PROG (1) /*!< non-blocking I/O via low-level programming interface */
#define CHDRV_NB_TRANS_TYPE_EXTERNAL (2) /*!< externally requested non-blocking I/O transaction */
/* Programming interface register addresses */
#define CH_PROG_REG_PING 0x00 /*!< Read-only register used during device discovery. */
#define CH_PROG_REG_CPU 0x42 /*!< Processor control register address. */
#define CH_PROG_REG_STAT 0x43 /*!< Processor status register address. */
#define CH_PROG_REG_CTL 0x44 /*!< Data transfer control register address. */
#define CH_PROG_REG_ADDR 0x05 /*!< Data transfer starting address register address. */
#define CH_PROG_REG_CNT 0x07 /*!< Data transfer size register address. */
#define CH_PROG_REG_DATA 0x06 /*!< Data transfer value register address. */
#define CH_PROG_SIZEOF(R) ( (R) & 0x40 ? 1 : 2 )
/*!< Macro to determine programming register size. */
#define CH_PROG_XFER_SIZE (256) /*!< max size of a read operation via programming interface */
#define CHDRV_DEBUG_PIN_NUM (0) /*!< debug pin number (index) to use for debug indication */
#define CHDRV_MAX_I2C_QUEUE_LENGTH CHIRP_MAX_NUM_SENSORS /*!< Max queued non-blocking I2C transactions - value from chirp_board_config.h */
#define CHDRV_FREQLOCK_TIMEOUT_MS 100 /*!< Time to wait in chdrv_group_start() for sensor
initialization, in milliseconds. */
#define CHDRV_BANDWIDTH_INDEX_1 6 /*!< Index of first sample to use for calculating bandwidth. */
#define CHDRV_BANDWIDTH_INDEX_2 (CHDRV_BANDWIDTH_INDEX_1 + 1) /*!< Index of second sample to
use for calculating bandwidth. */
#define CHDRV_SCALEFACTOR_INDEX 4 /*!< Index for calculating scalefactor. */
#define CHDRV_TRIGGER_PULSE_US 5 /*!< Length of INT pulse to trigger sensor, in microseconds - minimum 800ns. */
#define CHDRV_DELAY_OVERHEAD_US 12 /*!< Tuning parameter to adjust pre-trigger timing */
#define CHDRV_PRETRIGGER_DELAY_US 600 /*!< Time to delay between triggering rx-only and tx/rx nodes, in us */
//! Hook routine pointer typedefs
typedef uint8_t (*chdrv_discovery_hook_t)(ch_dev_t *dev_ptr);
//! I2C transaction control structure
typedef struct chdrv_i2c_transaction {
uint8_t type; /*!< I2C transaction type: 0 = std, 1 = prog interface, 2 = external */
uint8_t rd_wrb; /*!< Read/write indicator: 0 if write operation, 1 if read operation */
uint8_t xfer_num; /*!< current transfer within this transaction */
uint16_t addr; /*!< I2C address */
uint16_t nbytes; /*!< Number of bytes to transfer */
ch_dev_t *dev_ptr; /*!< Pointer to ch_dev_t descriptor structure for individual sensor */
uint8_t *databuf; /*!< Pointer to buffer to receive data or containing data to send */
} chdrv_i2c_transaction_t;
//! I2C queue structure, for non-blocking access
typedef struct chdrv_i2c_queue {
uint8_t read_pending; /*!< Read transaction status: non-zero if read operation is pending */
uint8_t running; /*!< I2C transaction status: non-zero if I/O operation in progress */
uint8_t len; /*!< Number of transactions in queue */
uint8_t idx; /*!< Index of current transaction within queue */
chdrv_i2c_transaction_t transaction[CHDRV_MAX_I2C_QUEUE_LENGTH]; /*!< List of transactions in queue */
} chdrv_i2c_queue_t;
/*!
* \brief Calibrate the sensor real-time clock against the host microcontroller clock.
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* This function sends a pulse (timed by the host MCU) on the INT line to each device in the group, then reads back the
* count of sensor RTC cycles that elapsed during that pulse on each individual device. The result is stored in the ch_dev_t
* descriptor structure for each device and is subsequently used during range calculations.
*
* The length of the pulse is grp_ptr->rtc_cal_pulse_ms milliseconds (typically 100ms).
*
* \note The calibration pulse is sent to all devices in the group at the same time. Therefore all connected devices will
* see the same reference pulse length.
*
*/
void chdrv_group_measure_rtc(ch_group_t *grp_ptr);
/*!
* \brief Convert the sensor register values to a range using the calibration data in the ch_dev_t struct.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param tof value of TOF register
* \param tof_sf value of TOF_SF register
*
* \return range in millimeters, or \a CH_NO_TARGET (0xFFFFFFFF) if no object is detected.
* The range result format is fixed point with 5 binary fractional digits (divide by 32 to convert to mm).
*
* This function takes the time-of-flight and scale factor values from the sensor,
* and computes the actual one-way range based on the formulas given in the sensor datasheet.
*/
uint32_t chdrv_one_way_range(ch_dev_t *dev_ptr, uint16_t tof, uint16_t tof_sf);
/*!
* \brief Convert the sensor register values to a round-trip range using the calibration data in the ch_dev_t struct.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param tof value of TOF register
* \param tof_sf value of TOF_SF register
*
* \return range in millimeters, or \a CH_NO_TARGET (0xFFFFFFFF) if no object is detected.
* The range result format is fixed point with 5 binary fractional digits (divide by 32 to convert to mm).
*
* This function takes the time-of-flight and scale factor values from the sensor,
* and computes the actual round-trip range based on the formulas given in the sensor datasheet.
*/
uint32_t chdrv_round_trip_range(ch_dev_t *dev_ptr, uint16_t tof, uint16_t tof_sf);
/*!
* \brief Add an I2C transaction to the non-blocking queue
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
* \param instance pointer to an individual descriptor structure for a sensor
* \param rd_wrb read/write indicator: 0 if write operation, 1 if read operation
* \param type I2C transaction type: 0 = std, 1 = prog interface, 2 = external
* \param addr I2C address for transfer
* \param nbytes number of bytes to read/write
* \param data pointer to buffer to receive data or containing data to send
*
* \return 0 if successful, non-zero otherwise
*/
int chdrv_group_i2c_queue(ch_group_t *grp_ptr, ch_dev_t *instance, uint8_t rd_wrb, uint8_t type, uint16_t addr, uint16_t nbytes, uint8_t *data);
/*!
* \brief Add an I2C transaction for an external device to the non-blocking queue
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
* \param instance pointer to the ch_dev_t descriptor structure for a sensor
* \param rd_wrb read/write indicator: 0 if write operation, 1 if read operation
* \param addr I2C address for transfer
* \param nbytes number of bytes to read/write
* \param data pointer to buffer to receive data or containing data to send
*
* \return 0 if successful, non-zero otherwise
*
* This function queues an I2C transaction for an "external" device (i.e. not a Chirp sensor). It is used when the
* I2C bus is shared between the Chirp sensor(s) and other devices.
*
* The transaction is flagged for special handling when the I/O operation completes. Specifically, the
* \a chbsp_external_i2c_irq_handler() will be called by the driver to allow the board support packate (BSP)
* to perform any necessary operations.
*/
int chdrv_external_i2c_queue(ch_group_t *grp_ptr, ch_dev_t *instance, uint8_t rd_wrb, uint16_t addr,
uint16_t nbytes, uint8_t *data);
/*!
* \brief Start a non-blocking sensor readout
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* This function starts a non-blocking I/O operation on the specified group of sensors.
*/
void chdrv_group_i2c_start_nb(ch_group_t *grp_ptr);
/*!
* \brief Continue a non-blocking readout
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
* \param i2c_bus_index index value identifying I2C bus within group
*
* Call this function once from your I2C interrupt handler each time it executes.
* It will call \a chdrv_group_i2c_complete_callback() when all transactions are complete.
*/
void chdrv_group_i2c_irq_handler(ch_group_t *grp_ptr, uint8_t i2c_bus_index);
/*!
* \brief Wait for an individual sensor to finish start-up procedure.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param timeout_ms number of milliseconds to wait for sensor to finish start-up before returning failure
*
* \return 0 if startup sequence finished, non-zero if startup sequence timed out or sensor is not connected
*
* After the sensor is programmed, it executes an internal start-up and self-test sequence. This
* function waits the specified time in milliseconds for the sensor to finish this sequence.
*/
int chdrv_wait_for_lock(ch_dev_t *dev_ptr, uint16_t timeout_ms );
/*!
* \brief Wait for all sensors to finish start-up procedure.
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* \return 0 if startup sequence finished on all detected sensors, non-zero if startup sequence
* timed out on any sensor(s).
*
* After each sensor is programmed, it executes an internal start-up and self-test sequence. This
* function waits for all sensor devices to finish this sequence. For each device, the maximum
* time to wait is \a CHDRV_FREQLOCK_TIMEOUT_MS milliseconds.
*/
int chdrv_group_wait_for_lock(ch_group_t *grp_ptr);
/*!
* \brief Start a measurement in hardware triggered mode.
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* \return 0 if success, non-zero if \a grp_ptr pointer is invalid
*
* This function starts a triggered measurement on each sensor in a group, by briefly asserting
* the INT line to each device. Each sensor must have already been placed in hardware triggered
* mode before this function is called.
*/
int chdrv_group_hw_trigger(ch_group_t *grp_ptr);
/*!
* \brief Start a measurement in hardware triggered mode on one sensor.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
*
* \return 0 if success, non-zero if \a dev_ptr pointer is invalid
*
* This function starts a triggered measurement on a single sensor, by briefly asserting the INT
* line to the device. The sensor must have already been placed in hardware triggered mode before
* this function is called.
*
* \note This function requires implementing the optional chirp_bsp.h functions to control the
* INT pin direction and level for individual sensors (\a chbsp_set_io_dir_in(), \a chbsp_set_io_dir_out(),
* \a chbsp_io_set(), and \a chbsp_io_clear()).
*/
int chdrv_hw_trigger(ch_dev_t *dev_ptr);
/*!
* \brief Detect a connected sensor.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
*
* \return 1 if sensor is found, 0 if no sensor is found
*
* This function checks for a sensor on the I2C bus by attempting to reset, halt, and read from the
* device using the programming interface I2C address (0x45).
*
* In order for the device to respond, the PROG pin for the device must be asserted before this
* function is called. If there are multiple sensors in an application, only one device's PROG pin
* should be active at any time.
*/
int chdrv_prog_ping(ch_dev_t *dev_ptr);
/*!
* \brief Detect, program, and start a sensor.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
*
* \return 0 if write to sensor succeeded, non-zero otherwise
*
* This function probes the I2C bus for the device. If it is found, the sensor firmware is
* programmed into the device, and the application I2C address is set. Then the sensor is reset
* and execution starts.
*
* Once started, the sensor device will begin an internal initialization and self-test sequence.
* The \a chdrv_wait_for_lock() function may be used to wait for this sequence to complete.
*
* \note This routine will leave the PROG pin de-asserted when it completes.
*/
int chdrv_detect_and_program(ch_dev_t *dev_ptr);
/*!
* \brief Detect, program, and start all sensors in a group.
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* \return 0 for success, non-zero if write(s) failed to any sensor initially detected as present
*
* This function probes the I2C bus for each device in the group. For each detected sensor, the
* firmware is programmed into the device, and the application I2C address is set. Then the sensor
* is reset and execution starts.
*
* Once started, each device will begin an internal initialization and self-test sequence. The
* \a chdrv_group_wait_for_lock() function may be used to wait for this sequence to complete on all
* devices in the group.
*
* \note This routine will leave the PROG pin de-asserted for all devices in the group when it completes.
*/
int chdrv_group_detect_and_program(ch_group_t *grp_ptr);
/*!
* \brief Initialize the sensor device configuration.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure to be initialized
* \param i2c_addr I2C address to assign to this device. This will be the "application I2C
address" used to access the device after it is initialized. Each sensor
on an I2C interface must use a unique application I2C address.
* \param io_index index identifying this device. Each sensor in a group must have a
* unique \a io_index value.
* \param i2c_bus_index index identifying the I2C interface (bus) to use with this device
* \param part_number integer part number for sensor (e.g. 101 for CH101 device, or 201 for CH201))
*
* \return 0 (always)
*
* This function initializes the ch_dev_t descriptor structure for the device with the specified values.
*/
int chdrv_init(ch_dev_t *dev_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index,
uint16_t part_number);
/*!
* \brief Initialize data structures and hardware for sensor interaction and reset sensors.
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* \return 0 if hardware initialization is successful, non-zero otherwise
*
* This function is called internally by \a chdrv_group_start().
*/
int chdrv_group_prepare(ch_group_t* grp_ptr);
/*!
* \brief Initalize and start a group of sensors.
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* \return 0 if successful, 1 if device doesn't respond
*
* This function resets each sensor in programming mode, transfers the firmware image to the sensor's
* on-chip memory, changes the sensor's application I2C address from the default, then starts the
* sensor and sends a timed pulse on the INT line for real-time clock calibration.
*
* This function assumes firmware-specific initialization has already been performed for each ch_dev_t
* descriptor in the sensor group. (See \a ch_init()).
*/
int chdrv_group_start(ch_group_t *grp_ptr);
/*!
* \brief Write byte to a sensor application register.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param reg_addr register address
* \param data data value to transmit
*
* \return 0 if successful, non-zero otherwise
*/
int chdrv_write_byte(ch_dev_t *dev_ptr, uint16_t mem_addr, uint8_t data);
/*!
* \brief Write 16 bits to a sensor application register.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param mem_addr sensor memory/register address
* \param data data value to transmit
*
* \return 0 if successful, non-zero otherwise
*/
int chdrv_write_word(ch_dev_t *dev_ptr, uint16_t mem_addr, uint16_t data);
/*!
* \brief Read byte from a sensor application register.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param mem_addr sensor memory/register address
* \param data pointer to receive buffer
*
* \return 0 if successful, non-zero otherwise
*/
int chdrv_read_byte(ch_dev_t *dev_ptr, uint16_t mem_addr, uint8_t *data);
/*!
* \brief Read 16 bits from a sensor application register.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param mem_addr sensor memory/register address
* \param data pointer to receive buffer
*
* \return 0 if successful, non-zero otherwise
*/
int chdrv_read_word(ch_dev_t *dev_ptr, uint16_t mem_addr, uint16_t * data);
/*!
* \brief Read multiple bytes from a sensor application register location.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param mem_addr sensor memory/register address
* \param data pointer to receive buffer
* \param len number of bytes to read
*
* \return 0 if successful, non-zero otherwise
*
*/
int chdrv_burst_read(ch_dev_t *dev_ptr, uint16_t mem_addr, uint8_t *data, uint16_t len);
/*!
* \brief Write multiple bytes to a sensor application register location.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param mem_addr sensor memory/register address
* \param data pointer to transmit buffer containing data to send
* \param len number of bytes to write
*
* \return 0 if successful, non-zero otherwise
*
*/
int chdrv_burst_write(ch_dev_t *dev_ptr, uint16_t mem_addr, uint8_t *data, uint8_t len);
/*!
* \brief Perform a soft reset on a sensor.
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
* \param mem_addr sensor memory/register address
*
* \return 0 if successful, non-zero otherwise
*
* This function performs a soft reset on an individual sensor by writing to a special control register.
*/
int chdrv_soft_reset(ch_dev_t *dev_ptr);
/*!
* \brief Perform a hard reset on a group of sensors.
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* \return 0 if successful, non-zero otherwise
*
* This function performs a hardware reset on each device in a group of sensors by asserting each device's RESET_N pin.
*/
int chdrv_group_hard_reset(ch_group_t *grp_ptr );
/*!
* \brief Perform a soft reset on a group of sensors.
*
* \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
*
* \return 0 if successful, non-zero otherwise
*
* This function performs a soft reset on each device in a group of sensors by writing to a special
* control register.
*/
int chdrv_group_soft_reset(ch_group_t *grp_ptr );
/*!
* \brief Put sensor(s) in idle state
*
* \param dev_ptr pointer to the ch_dev_t descriptor structure for a sensor
*
* \return 0 if successful, non-zero otherwise
*
* This function places the sensor in an idle state by loading an idle loop instruction sequence.
* This is used only during early initialization of the device. This is NOT the same as putting a
* running device into "idle mode" by using the \a ch_set_mode() function.
*/
int chdrv_set_idle(ch_dev_t *dev_ptr );
/*!
* \brief Write to a sensor programming register.
*
* \param dev_ptr pointer to the ch_dev_t config structure for a sensor
* \param reg_addr sensor programming register address.
* \param data 8-bit or 16-bit data to transmit.
*
* \return 0 if write to sensor succeeded, non-zero otherwise
*
* This function writes a value to a sensor programming register.
*/
int chdrv_prog_write(ch_dev_t *dev_ptr, uint8_t reg_addr, uint16_t data);
/*!
* \brief Write bytes to a sensor device in programming mode.
*
* \param dev_ptr pointer to the ch_dev_t config structure for a sensor
* \param message pointer to a buffer containing the bytes to write
* \param len number of bytes to write
*
* \return 0 if successful, non-zero otherwise
*
* This function writes bytes to the device using the programming I2C address. The
* PROG line for the device must have been asserted before this function is called.
*/
int chdrv_prog_i2c_write(ch_dev_t *dev_ptr, uint8_t *message, uint16_t len);
/*!
* \brief Read bytes from a sensor device in programming mode.
*
* \param dev_ptr pointer to the ch_dev_t config structure for a sensor
* \param message pointer to a buffer where read bytes will be placed
* \param len number of bytes to read
*
* \return 0 if successful, non-zero otherwise
*
* This function reads bytes from the device using the programming I2C address. The
* PROG line for the device must have been asserted before this function is called.
*/
int chdrv_prog_i2c_read(ch_dev_t *dev_ptr, uint8_t *message, uint16_t len);
/*!
* \brief Read bytes from a sensor device in programming mode, non-blocking.
*
* \param dev_ptr pointer to the ch_dev_t config structure for a sensor
* \param message pointer to a buffer where read bytes will be placed
* \param len number of bytes to read
*
* \return 0 if successful, non-zero otherwise
*
* This function temporarily changes the device I2C address to the low-level programming
* interface, and issues a non-blocking read request. The PROG line for the device must have
* been asserted before this function is called.
*/
int chdrv_prog_i2c_read_nb(ch_dev_t *dev_ptr, uint8_t *message, uint16_t len);
/*!
* \brief Write to sensor memory.
*
* \param dev_ptr pointer to the ch_dev_t config structure for a sensor
* \param addr sensor programming register start address
* \param message pointer to data to transmit
* \param nbytes number of bytes to write
*
* \return 0 if write to sensor succeeded, non-zero otherwise
*
* This function writes to sensor memory using the low-level programming interface. The type
* of write is automatically determined based on data length and target address alignment.
*/
int chdrv_prog_mem_write(ch_dev_t *dev_ptr, uint16_t addr, uint8_t *message, uint16_t nbytes);
/*!
* \brief Register a hook routine to be called after device discovery.
*
* \param grp_ptr pointer to the ch_group_t config structure for a group of sensors
* \param hook_func_ptr address of hook routine to be called
*
* This function sets a pointer to a hook routine, which will be called from the
* Chirp driver when each device is discovered on the I2C bus, before the device is initialized.
*
* This function should be called between \a ch_init() and \a ch_group_start().
*/
void chdrv_discovery_hook_set(ch_group_t *grp_ptr, chdrv_discovery_hook_t hook_func_ptr);
/*!
* \brief Set the pre-trigger delay for rx-only sensors
*
* \param grp_ptr pointer to the ch_group_t config structure for a group of sensors
* \param delay_us time to delay between triggering rx-only and tx/rx nodes, in microseconds
*
* This function sets a delay interval that will be inserted between triggering rx-only sensors
* and tx/rx sensors. This delay allows the rx-only sensor(s) to settle from any startup disruption
* (e.g. PMUT "ringdown") before the ultrasound pulse is generated by the tx node.
*
*/
void chdrv_pretrigger_delay_set(ch_group_t *grp_ptr, uint16_t delay_us);
#endif /* CH_DRIVER_H_ */

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/*!
* \file ch_math_utils.h
* \date July 20, 2017
* \author nparikh
* \copyright Copyright 2017 Chirp Microsystems. All rights reserved.
* \brief Functions for performing fixed point arithmetic.
* https://github.com/dmoulding/log2fix
* https://github.com/chmike/fpsqrt
*/
#ifndef CH_MATH_UTILS_H_
#define CH_MATH_UTILS_H_
#include <stdio.h>
#include <math.h>
#include <stdint.h>
#define FRACT_BITS 16
#define INT2FIXED(x) ((x) << FRACT_BITS)
#define FLOAT2FIXED(x) ((fixed_t)((x) * (1 << FRACT_BITS)))
#define FIXED2INT(x) ((x) >> FRACT_BITS)
#define FIXED2FLOAT(x) (((float)(x)) / (1 << FRACT_BITS))
#define FIXEDDIV(x,y) ((fixed_t)(((uint64_t)(x) << FRACT_BITS) / (y)))
#define FIXEDMUL(x,y) ((fixed_t)(((x) >> (FRACT_BITS/2)) * ((y) >> (FRACT_BITS/2))))
#define FIXED_PI 0x3243FU
#define INV_LOG2_E_Q1DOT31 0x58b90bfcU // Inverse log base 2 of e, Q1.31 format
#define Q31_TO_Q16_SHIFT_BITS 15 // Shift Q31 format by 15 bits to give Q16
#define Q31_TO_Q16_SHIFT_1 10 // Number of bits to shift in first step
#define Q31_TO_Q16_SHIFT_2 (Q31_TO_Q16_SHIFT_BITS - Q31_TO_Q16_SHIFT_1)
// Number of bits to shift in second step
typedef uint32_t fixed_t;
fixed_t FP_sqrt(fixed_t x);
fixed_t FP_log2(fixed_t x);
fixed_t FP_log(fixed_t x);
int32_t sqrt_int32( int32_t v );
#endif /* CH_MATH_UTILS_H_ */

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/*!
* \file ch101_finaltest.c
*
* \brief Chirp CH101 Finaltest firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_finaltest.h"
#include "ch_common.h"
#include "ch_math_utils.h"
uint8_t ch101_finaltest_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_finaltest_fw;
dev_ptr->fw_version_string = ch101_finaltest_version;
dev_ptr->ram_init = get_ram_ch101_finaltest_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_finaltest_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_finaltest_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch101_finaltest_store_pt_result;
dev_ptr->store_op_freq = ch101_finaltest_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch101_finaltest_store_scale_factor;
dev_ptr->get_locked_state = ch101_finaltest_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = NULL;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = (ch_get_range_func_t) ch101_finaltest_get_range;
dev_ptr->api_funcs.get_amplitude = ch101_finaltest_get_amplitude;
dev_ptr->api_funcs.get_iq_data = (ch_get_iq_data_func_t) ch101_finaltest_get_iq_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
/* Init max sample count */
dev_ptr->max_samples = CH101_FINALTEST_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
uint8_t ch101_finaltest_set_rxqueue_item( ch_dev_t* dev_ptr, uint8_t queue_index,
uint8_t samples, uint8_t attenuation, uint8_t gain )
{
uint8_t ret = ! dev_ptr ||
queue_index >= CH101_FINALTEST_RXQUEUE_ITEMS ||
samples >= 1 << CH101_FINALTEST_RXQUEUE_BITS_SAMPLES ||
attenuation >= 1 << CH101_FINALTEST_RXQUEUE_BITS_ATTEN ||
gain >= 1 << CH101_FINALTEST_RXQUEUE_BITS_GAIN;
if( ! ret )
{
uint16_t item =
(uint16_t)samples << CH101_FINALTEST_RXQUEUE_BITPOS_SAMPLES |
(uint16_t)attenuation << CH101_FINALTEST_RXQUEUE_BITPOS_ATTEN |
(uint16_t)gain << CH101_FINALTEST_RXQUEUE_BITPOS_GAIN;
ret = chdrv_write_word( dev_ptr, CH101_FINALTEST_REG_RXQUEUE + queue_index * sizeof(item), item );
}
return ret;
}
uint8_t ch101_finaltest_set_threshold(ch_dev_t *dev_ptr, uint16_t threshold) {
uint8_t ret = 1;
if (dev_ptr->sensor_connected) {
ret = chdrv_write_word(dev_ptr, CH101_FINALTEST_REG_THRESHOLD, threshold);
}
return ret;
}
uint32_t ch101_finaltest_get_range(ch_dev_t *dev_ptr, ch101_finaltest_range_t range_type) {
uint8_t tof_reg;
uint32_t range = CH_NO_TARGET;
uint16_t time_of_flight;
uint16_t tof_scale_factor;
int err;
if (dev_ptr->sensor_connected) {
tof_reg = CH101_FINALTEST_REG_TOF;
err = chdrv_read_word(dev_ptr, tof_reg, &time_of_flight);
if (!err && (time_of_flight != UINT16_MAX)) { // If object detected
chdrv_read_word(dev_ptr, CH101_FINALTEST_REG_TOF_SF, &tof_scale_factor);
if (tof_scale_factor != 0) {
uint32_t num = (CH_SPEEDOFSOUND_MPS * dev_ptr->group->rtc_cal_pulse_ms * (uint32_t) time_of_flight);
uint32_t den = ((uint32_t) dev_ptr->rtc_cal_result * (uint32_t) tof_scale_factor) >> 11; // XXX need define
range = (num / den);
if (range_type == CH101_FINALTEST_RANGE_ECHO_ONE_WAY) {
range /= 2;
}
/* Adjust for oversampling, if used */
range >>= dev_ptr->oversample;
}
}
}
return range;
}
uint16_t ch101_finaltest_get_amplitude(ch_dev_t *dev_ptr) {
uint16_t intensity = 0xFFFF;
chdrv_read_word(dev_ptr, CH101_FINALTEST_REG_AMPLITUDE, &intensity);
return intensity;
}
uint8_t ch101_finaltest_get_iq_data(ch_dev_t *dev_ptr, uint8_t /*ch_iq_sample_t*/ *buf_ptr, uint16_t start_sample,
uint16_t num_samples, uint8_t /*ch_io_mode_t*/ mode) {
uint16_t iq_data_addr = CH101_FINALTEST_REG_DATA;
uint16_t num_bytes = (num_samples * sizeof(ch_iq_sample_t));
uint8_t error = 0;
iq_data_addr += (start_sample * sizeof(ch_iq_sample_t));
if (iq_data_addr > UINT8_MAX) {
error = 1;
}
if (mode != CH_IO_MODE_BLOCK) {
error = 1;
}
if (!error) {
error = chdrv_burst_read(dev_ptr, iq_data_addr, (uint8_t *) buf_ptr, num_bytes);
}
return error;
}
uint8_t ch101_finaltest_get_locked_state(ch_dev_t *dev_ptr) {
uint8_t locked = CH101_FINALTEST_READY_NOTLOCKED;
if (dev_ptr->sensor_connected) {
chdrv_read_byte(dev_ptr, CH101_FINALTEST_REG_READY, &locked);
}
return (locked == CH101_FINALTEST_READY_FREQ_LOCKED_BM);
}
void ch101_finaltest_store_pt_result(ch_dev_t *dev_ptr) {
chdrv_read_word(dev_ptr, CH101_FINALTEST_REG_CAL_RESULT, &(dev_ptr->rtc_cal_result));
}
void ch101_finaltest_store_op_freq(ch_dev_t *dev_ptr){
dev_ptr->op_frequency = ch101_finaltest_get_op_freq(dev_ptr);
}
void ch101_finaltest_store_scale_factor(ch_dev_t *dev_ptr){
ch_iq_sample_t QIData;
chdrv_burst_read(dev_ptr, CH101_FINALTEST_REG_DATA + (CH101_SCALEFACTOR_INDEX * 4),(uint8_t *) &QIData, 4);
dev_ptr->scale_factor = ch_iq_to_amplitude(&QIData);
}
int ch101_finaltest_set_pulse_width(ch_dev_t *dev_ptr,uint8_t pulse_width){
return chdrv_write_byte(dev_ptr, CH101_FINALTEST_REG_PULSE_WIDTH, pulse_width);
}
int ch101_finaltest_set_tx_length(ch_dev_t *dev_ptr, uint8_t tx_length){
return chdrv_write_byte(dev_ptr, CH101_FINALTEST_REG_TXLENGTH, tx_length);
}
uint32_t ch101_finaltest_get_op_freq(ch_dev_t *dev_ptr){
uint32_t num,den,opfreq;
uint16_t raw_freq; // aka scale factor
uint32_t freq_counter_cycles = dev_ptr->freqCounterCycles;
chdrv_read_word(dev_ptr, CH101_FINALTEST_REG_TOF_SF, &raw_freq);
num = (uint32_t)(((dev_ptr->rtc_cal_result)*1000U) / (16U * freq_counter_cycles))*(uint32_t)(raw_freq);
den = dev_ptr->group->rtc_cal_pulse_ms;
opfreq = (num/den);
return opfreq;
}

156
CHIRP/drivers/src/ch101_finaltest_fw.c Normal file
View File

@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 2.7.15)
// File generated from finaltest_v10.hex at 2020-11-23 18:00:21.462000 by klong
//
// Copyright (c) 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_finaltest.h"
const char * ch101_finaltest_version = "finaltest_v10";
const char * ch101_finaltest_gitsha1 = "39cf6ffa6996d56bb340be4d6d53450ef80e7d5d";
#define RAM_INIT_ADDRESS 1478
#define RAM_INIT_WRITE_SIZE 10
uint16_t get_ch101_finaltest_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_finaltest_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_finaltest_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x64, 0x00, 0x10, 0x27, 0x00, 0x00, 0x01, 0x00, };
const unsigned char * get_ram_ch101_finaltest_init_ptr(void) { return &ram_ch101_finaltest_init[0];}
const unsigned char ch101_finaltest_fw[CH101_FW_SIZE] = {
0xb2, 0x40, 0x80, 0x5a, 0x20, 0x01, 0xe2, 0x42, 0xe0, 0x01, 0xd2, 0x43, 0xe2, 0x01, 0xf2, 0x40,
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};

153
CHIRP/drivers/src/ch101_floor.c Normal file
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/*! \file ch101_floor.c
*
* \brief Chirp CH101 Floor Detection firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_floor.h"
#include "ch_common.h"
#include "ch_math_utils.h"
/* Forward references */
uint8_t ch101_floor_set_sample_window(ch_dev_t *dev_ptr, uint16_t start_sample, uint16_t end_sample);
uint16_t ch101_floor_get_amplitude_avg(ch_dev_t *dev_ptr);
uint8_t ch101_floor_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_floor_fw;
dev_ptr->fw_version_string = ch101_floor_version;
dev_ptr->ram_init = get_ram_ch101_floor_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_floor_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_floor_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = NULL;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = NULL;
dev_ptr->api_funcs.get_range = NULL;
dev_ptr->api_funcs.get_amplitude = NULL;
dev_ptr->api_funcs.get_amplitude_avg = ch101_floor_get_amplitude_avg;
dev_ptr->api_funcs.set_sample_window = ch101_floor_set_sample_window;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = NULL; // Not supported
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
/* Init max sample count */
dev_ptr->max_samples = CH101_FLOOR_MAX_SAMPLES;
/* This firmware uses oversampling */
dev_ptr->oversample = 2; // 4x oversampling (value is power of 2)
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
uint8_t ch101_floor_set_sample_window(ch_dev_t *dev_ptr, uint16_t start_sample, uint16_t end_sample) {
uint8_t ret_val = 0;
uint16_t num_win_samples = ((end_sample - start_sample) + 1);
/* Check input parameters */
if ((num_win_samples > CH101_FLOOR_MAX_SAMPLES) ||
(start_sample >= CH101_FLOOR_MAX_SAMPLES) ||
(end_sample > CH101_FLOOR_MAX_SAMPLES)) {
ret_val = 1; /* error */
}
/* Write window start and end registers */
if (!ret_val) {
chdrv_write_byte(dev_ptr, CH101_FLOOR_REG_RX_HOLDOFF, start_sample);
chdrv_write_byte(dev_ptr, CH101_FLOOR_REG_RX_WIN_END, (end_sample + 1));
dev_ptr->win_start_sample = start_sample;
dev_ptr->num_win_samples = num_win_samples;
}
return ret_val;
}
#define AMP_CORDIC_CORRECT_NUM (122) /* numerator of Cordic amplitude correction (1.22) */
#define AMP_CORDIC_CORRECT_DEN (100) /* denominator of Cordic amplitude correction (1.22) */
uint16_t ch101_floor_get_amplitude_avg(ch_dev_t *dev_ptr) {
uint32_t amp_total;
uint16_t amp_lo;
uint16_t amp_hi;
uint16_t amp_avg = 0;
uint8_t err = 0;
/* Read total amplitude across window (two 16-bit halves) */
err = chdrv_read_word(dev_ptr, CH101_FLOOR_REG_AMPLITUDE_LOW, &amp_lo);
if (!err) {
err = chdrv_read_word(dev_ptr, CH101_FLOOR_REG_AMPLITUDE_HIGH, &amp_hi);
}
/* Combine values and calculate average */
if (!err) {
amp_total = (amp_hi << 16) | amp_lo;
amp_avg = (uint16_t) ((amp_total * AMP_CORDIC_CORRECT_NUM) / (dev_ptr->num_win_samples * AMP_CORDIC_CORRECT_DEN));
}
return amp_avg;
}

153
CHIRP/drivers/src/ch101_floor_fw.c Normal file
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@@ -0,0 +1,153 @@
//Chirp Microsystems Firmware Header Generator
//File generated from robo_floor_v13.hex at 2020-05-06 14:27:09.318000 by klong
#include <stdint.h>
#include "ch101.h"
#include "ch101_floor.h"
const char * ch101_floor_version = "robo_floor_v13.hex";
#define RAM_INIT_ADDRESS 1160
#define RAM_INIT_WRITE_SIZE 20
uint16_t get_ch101_floor_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_floor_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_floor_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0xFA, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x00,
0x64, 0x00, 0x00, 0x01, };
const unsigned char * get_ram_ch101_floor_init_ptr(void) { return &ram_ch101_floor_init[0];}
const unsigned char ch101_floor_fw[CH101_FW_SIZE] = {
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};

575
CHIRP/drivers/src/ch101_gppc.c Normal file
View File

@@ -0,0 +1,575 @@
/*! \file ch101_gppc.c
*
* \brief Chirp CH101 General Purpose Pitch Catch firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gppc.h"
#include "ch_common.h"
#include "chirp_bsp.h"
#include "ch_math_utils.h"
//#define DEBUG_DCO_SEARCH(X) X
uint8_t ch101_gppc_set_num_samples(ch_dev_t *dev_ptr, uint16_t num_samples);
uint32_t ch101_gppc_get_range(ch_dev_t *dev_ptr, ch_range_t range_type);
uint32_t ch101_gppc_get_tof_us(ch_dev_t *dev_ptr);
uint8_t ch101_gppc_set_static_coeff(ch_dev_t *dev_ptr, uint8_t static_coeff);
uint8_t ch101_gppc_get_static_coeff(ch_dev_t *dev_ptr);
uint8_t ch101_gppc_set_rx_holdoff(ch_dev_t *dev_ptr, uint16_t rx_holdoff);
uint16_t ch101_gppc_get_rx_holdoff(ch_dev_t *dev_ptr);
uint8_t ch101_gppc_set_tx_length(ch_dev_t *dev_ptr, uint8_t tx_length);
uint8_t ch101_gppc_get_tx_length(ch_dev_t *dev_ptr);
uint8_t ch101_gppc_get_rx_pulse_length(ch_dev_t *dev_ptr);
uint8_t ch101_gppc_set_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index, uint16_t amplitude);
uint16_t ch101_gppc_get_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index);
uint8_t ch101_gppc_get_iq_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples,
ch_io_mode_t mode);
uint8_t ch101_gppc_set_modulated_tx_data(ch_dev_t *dev_ptr, uint8_t tx_bits);
uint8_t ch101_gppc_get_demodulated_rx_data(ch_dev_t *dev_ptr, uint8_t rx_pulse_length, uint8_t *data_ptr);
static uint8_t get_sample_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples,
ch_io_mode_t mode, uint8_t sample_size_in_byte);
static uint8_t demodulate_data(uint16_t* amplitudes, uint8_t *data_ptr);
static uint8_t check_parity(uint8_t n);
static uint8_t reverse_bits(uint8_t n);
uint8_t ch101_gppc_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_GPPC_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gppc_fw;
dev_ptr->fw_version_string = ch101_gppc_version;
dev_ptr->ram_init = get_ram_ch101_gppc_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gppc_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gppc_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch101_gppc_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = NULL;
dev_ptr->api_funcs.get_range = ch101_gppc_get_range;
dev_ptr->api_funcs.get_tof_us = ch101_gppc_get_tof_us;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch101_gppc_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = NULL; // Not supported
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_threshold = ch101_gppc_set_threshold;
dev_ptr->api_funcs.get_threshold = ch101_gppc_get_threshold;
dev_ptr->api_funcs.set_thresholds = NULL; // Not supported
dev_ptr->api_funcs.get_thresholds = NULL; // Not supported
dev_ptr->api_funcs.set_static_coeff = ch101_gppc_set_static_coeff;
dev_ptr->api_funcs.get_static_coeff = ch101_gppc_get_static_coeff;
dev_ptr->api_funcs.set_rx_holdoff = ch101_gppc_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch101_gppc_get_rx_holdoff;
dev_ptr->api_funcs.get_demodulated_rx_data = ch101_gppc_get_demodulated_rx_data;
dev_ptr->api_funcs.set_tx_length = ch101_gppc_set_tx_length;
dev_ptr->api_funcs.get_tx_length = ch101_gppc_get_tx_length;
dev_ptr->api_funcs.set_modulated_tx_data = ch101_gppc_set_modulated_tx_data;
dev_ptr->api_funcs.get_rx_pulse_length = ch101_gppc_get_rx_pulse_length;
dev_ptr->api_funcs.set_frequency = ch101_gppc_set_frequency;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPPC_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
uint32_t ch101_gppc_get_range(ch_dev_t *dev_ptr, ch_range_t range_type) {
uint8_t tof_reg;
uint32_t range = CH_NO_TARGET;
uint16_t time_of_flight;
uint16_t scale_factor;
int err;
if (dev_ptr->sensor_connected) {
if (dev_ptr->part_number == CH101_PART_NUMBER) {
tof_reg = CH101_COMMON_REG_TOF;
} else {
tof_reg = CH201_COMMON_REG_TOF;
}
err = chdrv_read_word(dev_ptr, tof_reg, &time_of_flight);
if (!err && (time_of_flight != UINT16_MAX)) { // If object detected
if (dev_ptr->scale_factor == 0) {
ch_common_store_scale_factor(dev_ptr);
}
scale_factor = dev_ptr->scale_factor;
if (scale_factor != 0) {
uint32_t num = (CH_SPEEDOFSOUND_MPS * dev_ptr->group->rtc_cal_pulse_ms * (uint32_t) time_of_flight);
uint32_t den = ((uint32_t) dev_ptr->rtc_cal_result * (uint32_t) scale_factor) >> 11; // XXX need define
range = (num / den);
range *= 2;
if (range_type == CH_RANGE_ECHO_ONE_WAY) {
range /= 2;
}
/* Adjust for oversampling, if used */
range >>= dev_ptr->oversample;
}
}
}
return range;
}
uint32_t ch101_gppc_get_tof_us(ch_dev_t *dev_ptr) {
uint16_t time_of_flight;
uint64_t time_of_flight_us = 0;
int err;
if (dev_ptr->sensor_connected)
{
err = chdrv_read_word(dev_ptr, CH101_COMMON_REG_TOF, &time_of_flight);
if (!err && (time_of_flight != UINT16_MAX)) { // If object detected
time_of_flight_us = (uint64_t) time_of_flight*1000000/(dev_ptr->op_frequency*32);
}
}
return (uint32_t)time_of_flight_us*2;
}
uint8_t ch101_gppc_set_num_samples(ch_dev_t *dev_ptr, uint16_t num_samples ) {
uint8_t max_range_reg;
uint8_t ret_val = 1; // default is error (not connected or num_samples too big)
max_range_reg = CH101_COMMON_REG_MAX_RANGE;
num_samples /= 2; // each internal count for CH201 represents 2 physical samples
if (dev_ptr->sensor_connected && (num_samples <= UINT8_MAX)) {
ret_val = chdrv_write_byte(dev_ptr, max_range_reg, num_samples);
}
if (!ret_val) {
dev_ptr->num_rx_samples = (num_samples * 2); // store actual physical sample count
}
else {
dev_ptr->num_rx_samples = 0;
}
return ret_val;
}
uint32_t ch101_gppc_set_new_dco_code(ch_dev_t *dev_ptr, uint16_t dcocode){
ch_common_set_mode(dev_ptr, CH_MODE_IDLE);
chdrv_write_word(dev_ptr, CH101_GPPC_REG_DCO_SET, dcocode);
chdrv_wait_for_lock(dev_ptr, CHDRV_FREQLOCK_TIMEOUT_MS);
ch_common_set_mode(dev_ptr, CH_MODE_TRIGGERED_TX_RX);
ch_common_store_op_freq(dev_ptr);
return dev_ptr->op_frequency;
}
uint8_t ch101_gppc_set_frequency(ch_dev_t *dev_ptr, uint32_t target_freq_Hz) {
uint32_t freq = 0;
uint32_t dcoper[2];
//initially, find two points on the DCO curve, which should be linear in period
//increasing DCO code ~= increasing DCO period
dcoper[0] = 1000000000U / ch101_gppc_set_new_dco_code(dev_ptr, CH_DCO_LOW);
dcoper[1] = 1000000000U / ch101_gppc_set_new_dco_code(dev_ptr, CH_DCO_HIGH);
uint32_t targetper = 1000000000U / target_freq_Hz; ///5617
//Now interpolate to estimate the DCO code
uint16_t dcoest = (int32_t)CH_DCO_LOW + ((int32_t) targetper - (int32_t) dcoper[0]) * (int32_t)(CH_DCO_HIGH - CH_DCO_LOW) /
(int32_t)(dcoper[1] - dcoper[0]);
freq = ch101_gppc_set_new_dco_code(dev_ptr, dcoest);
DEBUG_DCO_SEARCH(printf("# Port %u, dco0=%lu, dco1=%lu, dcoest=%u, freq=%lu, targ= %lu\n",
dev_ptr->io_index, dcoper[0], dcoper[1], dcoest, freq, target_freq_Hz);)
int32_t minerr = abs(freq - target_freq_Hz);
uint32_t minoff = 0;
//if the error is too high, search around the estimate for the best code
if (minerr > CH_DCO_SEARCH_THRESHOLD) {
DEBUG_DCO_SEARCH(printf("# Frequency error above %dHz, searching for better match to %luHz\n",
CH_DCO_SEARCH_THRESHOLD, target_freq_Hz);)
int i;
for (i = -5; i < 6; i++) { //+/-5 DCO codes should be about +/-1500Hz
freq = ch101_gppc_set_new_dco_code(dev_ptr, dcoest + i);
if (abs(freq - target_freq_Hz) < minerr) {
minerr = abs(freq - target_freq_Hz);
minoff = i;
DEBUG_DCO_SEARCH(printf("# *");)
}
DEBUG_DCO_SEARCH(printf("# dcoest=%u, freq=%lu\n", dcoest + i, freq);)
}
dcoest = dcoest + minoff;
freq = ch101_gppc_set_new_dco_code(dev_ptr, dcoest);
DEBUG_DCO_SEARCH(printf("# Final setting dco=%u, freq=%lu\n", dcoest, freq);)
}
return 0;
}
uint8_t ch101_gppc_set_static_coeff(ch_dev_t *dev_ptr, uint8_t static_coeff) {
uint8_t reg = CH101_GPPC_REG_ST_COEFF;
uint8_t ret_val = RET_OK;
if (dev_ptr->sensor_connected) {
ret_val |= chdrv_write_byte(dev_ptr, reg, static_coeff);
}
return ret_val;
}
uint8_t ch101_gppc_get_static_coeff(ch_dev_t *dev_ptr) {
uint8_t reg = CH101_GPPC_REG_ST_COEFF;
uint8_t static_coeff = 0;
if (dev_ptr->sensor_connected) {
chdrv_read_byte(dev_ptr, reg, &static_coeff);
}
return static_coeff;
}
uint8_t ch101_gppc_set_rx_holdoff(ch_dev_t *dev_ptr, uint16_t num_samples) {
uint8_t reg = CH101_GPPC_REG_RX_HOLDOFF;
uint8_t ret_val = RET_OK;
if (dev_ptr->sensor_connected) {
ret_val |= chdrv_write_byte(dev_ptr, reg, num_samples);
}
return ret_val;
}
uint16_t ch101_gppc_get_rx_holdoff(ch_dev_t *dev_ptr) {
uint8_t reg = CH101_GPPC_REG_RX_HOLDOFF;
uint8_t num_samples = 0;
if (dev_ptr->sensor_connected) {
chdrv_read_byte(dev_ptr, reg, &num_samples);
}
return (uint16_t) num_samples;
}
uint8_t ch101_gppc_set_tx_length(ch_dev_t *dev_ptr, uint8_t tx_length) {
uint8_t reg = CH101_GPPC_REG_TX_LENGTH;
uint8_t ret_val = RET_OK;
if (dev_ptr->sensor_connected) {
ret_val |= chdrv_write_byte(dev_ptr, reg, tx_length);
}
return ret_val;
}
uint8_t ch101_gppc_get_tx_length(ch_dev_t *dev_ptr) {
uint8_t reg = CH101_GPPC_REG_TX_LENGTH;
uint8_t tx_length = 0;
if (dev_ptr->sensor_connected) {
chdrv_read_byte(dev_ptr, reg, &tx_length);
}
return tx_length;
}
uint8_t ch101_gppc_get_rx_pulse_length(ch_dev_t *dev_ptr) {
uint8_t reg = CH101_GPPC_REG_RX_PULSE_LENGTH;
uint8_t rx_pulse_length = 0;
if (dev_ptr->sensor_connected) {
chdrv_read_byte(dev_ptr, reg, &rx_pulse_length);
}
return rx_pulse_length;
}
static uint8_t get_sample_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples,
ch_io_mode_t mode, uint8_t sample_size_in_byte) {
uint16_t iq_data_addr;
ch_group_t *grp_ptr = dev_ptr->group;
int error = 1;
uint8_t use_prog_read = 0; // default = do not use low-level programming interface
#ifndef USE_STD_I2C_FOR_IQ
if (grp_ptr->num_connected[dev_ptr->i2c_bus_index] == 1) { // if only one device on this bus
use_prog_read = 1; // use low-level interface
}
#endif
iq_data_addr = CH101_GPPC_REG_DATA;
iq_data_addr += (start_sample * sample_size_in_byte);
if ((num_samples != 0) && ((start_sample + num_samples) <= dev_ptr->max_samples)) {
uint16_t num_bytes = (num_samples * sample_size_in_byte);
if (mode == CH_IO_MODE_BLOCK) {
/* blocking transfer */
if (use_prog_read) {
/* use low-level programming interface for speed */
int num_transfers = (num_bytes + (CH_PROG_XFER_SIZE - 1)) / CH_PROG_XFER_SIZE;
int bytes_left = num_bytes; // remaining bytes to read
/* Convert register offsets to full memory addresses */
if (dev_ptr->part_number == CH101_PART_NUMBER) {
iq_data_addr += CH101_DATA_MEM_ADDR + CH101_COMMON_I2CREGS_OFFSET;
} else {
iq_data_addr += CH201_DATA_MEM_ADDR + CH201_COMMON_I2CREGS_OFFSET;
}
chbsp_program_enable(dev_ptr); // assert PROG pin
for (int xfer = 0; xfer < num_transfers; xfer++) {
int bytes_to_read;
uint8_t message[] = { (0x80 | CH_PROG_REG_CTL), 0x09 }; // read burst command
if (bytes_left > CH_PROG_XFER_SIZE) {
bytes_to_read = CH_PROG_XFER_SIZE;
} else {
bytes_to_read = bytes_left;
}
chdrv_prog_write(dev_ptr, CH_PROG_REG_ADDR, (iq_data_addr + (xfer * CH_PROG_XFER_SIZE)));
chdrv_prog_write(dev_ptr, CH_PROG_REG_CNT, (bytes_to_read - 1));
error = chdrv_prog_i2c_write(dev_ptr, message, sizeof(message));
error |= chdrv_prog_i2c_read(dev_ptr, ((uint8_t *)buf_ptr + (xfer * CH_PROG_XFER_SIZE)), bytes_to_read);
bytes_left -= bytes_to_read;
}
chbsp_program_disable(dev_ptr); // de-assert PROG pin
} else { /* if (use_prog_read) */
/* use standard I2C interface */
error = chdrv_burst_read(dev_ptr, iq_data_addr, (uint8_t *) buf_ptr, num_bytes);
}
} else {
/* non-blocking transfer - queue a read transaction (must be started using ch_io_start_nb() ) */
if (use_prog_read && (grp_ptr->i2c_drv_flags & I2C_DRV_FLAG_USE_PROG_NB)) {
/* Use low-level programming interface to read data */
/* Convert register offsets to full memory addresses */
if (dev_ptr->part_number == CH101_PART_NUMBER) {
iq_data_addr += (CH101_DATA_MEM_ADDR + CH101_COMMON_I2CREGS_OFFSET);
} else {
iq_data_addr += (CH201_DATA_MEM_ADDR + CH201_COMMON_I2CREGS_OFFSET);
}
error = chdrv_group_i2c_queue(grp_ptr, dev_ptr, 1, CHDRV_NB_TRANS_TYPE_PROG, iq_data_addr, num_bytes,
(uint8_t *) buf_ptr);
} else {
/* Use regular I2C register interface to read data */
error = chdrv_group_i2c_queue(grp_ptr, dev_ptr, 1, CHDRV_NB_TRANS_TYPE_STD, iq_data_addr, num_bytes,
(uint8_t*) buf_ptr);
}
}
}
return error;
}
uint8_t ch101_gppc_get_iq_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples,
ch_io_mode_t mode) {
return get_sample_data(dev_ptr, buf_ptr, start_sample, num_samples, mode, sizeof(ch_iq_sample_t));
}
uint8_t ch101_gppc_set_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index, uint16_t amplitude) {
uint8_t ret_val = RET_OK;
uint8_t reg = CH101_GPPC_REG_THRESHOLD;
if (threshold_index >= CH101_GPPC_THRESHOLD_NUMBER)
return RET_ERR;
if (dev_ptr->sensor_connected) {
ret_val = chdrv_write_word(dev_ptr, reg, amplitude);
}
return ret_val;
}
uint16_t ch101_gppc_get_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index) {
uint16_t amplitude = 0;
uint8_t reg = CH101_GPPC_REG_THRESHOLD;
if ((threshold_index < CH101_GPPC_THRESHOLD_NUMBER) && dev_ptr->sensor_connected) {
chdrv_read_word(dev_ptr, reg, &amplitude);
}
return amplitude;
}
uint8_t ch101_gppc_set_modulated_tx_data(ch_dev_t *dev_ptr, uint8_t tx_data) {
uint8_t ret_val = RET_OK;
uint8_t tx_bits = 0;
uint8_t reg = CH101_GPPC_REG_TX_BITS;
if (tx_data > CH_TXMOD_DATA_MAX)
return RET_ERR;
if (dev_ptr->sensor_connected) {
if(check_parity(tx_data))
tx_data |= CH_TXBITS_BITMASK;
else
tx_data |= (CH_TXBITS_BITMASK | (1 << CH_PARITY_BIT));
/* LSB is sent first, so we have to reverse tx_data here */
tx_bits = reverse_bits(tx_data);
ret_val = chdrv_write_byte(dev_ptr, reg, tx_bits);
#ifdef CHDRV_DEBUG
char cbuf[80];
snprintf(cbuf, sizeof(cbuf), "# Set tx_bits=%x\n", tx_bits);
chbsp_print_str(cbuf);
#endif
}
return ret_val;
}
uint8_t ch101_gppc_get_demodulated_rx_data(ch_dev_t *dev_ptr, uint8_t rx_pulse_length, uint8_t *data_ptr) {
uint8_t ret_val = RET_OK;
uint8_t fudge_factor = 0;
uint16_t time_of_flight = 0, start = 0;
uint16_t min_amplitude = 0xFFFF;
uint16_t mod_amplitudes[MAX_NUM_OF_MOD_DATA];
chdrv_read_word(dev_ptr, CH101_GPPC_REG_TOF, &time_of_flight);
if(time_of_flight == UINT16_MAX){
return RET_ERR;
}
start = (time_of_flight >> 7) + rx_pulse_length + fudge_factor - 1;
chdrv_write_word(dev_ptr, CH101_GPPC_REG_I2C_READ_OFFSET, start * sizeof(ch_iq_sample_t));
/* find the start point with minimum amplitude */
for (int i = 0; i < MAX_FUDGE_FACTOR; i++) {
ch_iq_sample_t iq_data;
int err = ch_get_iq_data(dev_ptr, &iq_data, i, 1, CH_IO_MODE_BLOCK);
if (!err) {
uint16_t amplitude = ch_iq_to_amplitude(&iq_data);
if (amplitude < min_amplitude) {
min_amplitude = amplitude;
fudge_factor = i;
}
}
}
// reset I2C_READ_OFFSET register
chdrv_write_word(dev_ptr, CH101_GPPC_REG_I2C_READ_OFFSET, 0);
start += fudge_factor;
chdrv_write_word(dev_ptr, CH101_GPPC_REG_I2C_READ_OFFSET, start * sizeof(ch_iq_sample_t));
#ifdef CHDRV_DEBUG
char cbuf[80];
snprintf(cbuf, sizeof(cbuf), "# Set start point=%u\n", start);
chbsp_print_str(cbuf);
#endif
/* find 8 modulated data points */
for (int i=0; i < MAX_NUM_OF_MOD_DATA; i ++) {
ch_iq_sample_t iq_data;
int err = ch_get_iq_data(dev_ptr, &iq_data, i * sizeof(ch_iq_sample_t), 1, CH_IO_MODE_BLOCK);
if (!err) {
mod_amplitudes[i] = ch_iq_to_amplitude(&iq_data);
}
}
// reset I2C_READ_OFFSET register
chdrv_write_word(dev_ptr, CH101_GPPC_REG_I2C_READ_OFFSET, 0);
ret_val |= demodulate_data(mod_amplitudes, data_ptr);
return ret_val;
}
uint8_t demodulate_data(uint16_t* amplitudes, uint8_t *data) {
uint16_t min_amp = amplitudes[0], max_amp = amplitudes[1], avg = 0;
if(min_amp >= max_amp) {
return RET_ERR;
}
avg = (min_amp + max_amp)/2;
for(int i = 0; i < MAX_NUM_OF_MOD_DATA; i++) {
*data <<= 1;
if (amplitudes[i] > avg){
*data |= 0x1;
}
}
if (check_parity(*data)) {
return RET_ERR;
}
*data &= CH_RXDEMOD_DATA_BITMASK;
return RET_OK;
}
uint8_t check_parity(uint8_t n) {
uint8_t parity = 0;
while (n)
{
parity ^= 1;
n = n & (n - 1);
}
return parity;
}
uint8_t reverse_bits(uint8_t n) {
n = ((n & 0xf0) >> 4) | ((n & 0x0f) << 4);
n = ((n & 0xcc) >> 2) | ((n & 0x33) << 2);
n = ((n & 0xaa) >> 1) | ((n & 0x55) << 1);
return n;
}

156
CHIRP/drivers/src/ch101_gppc_fw.c Normal file
View File

@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 3.7.0)
// File generated from ccsout.hex at 2020-10-28 10:25:41.165552 by cryang
//
// Copyright @ 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gppc.h"
const char * ch101_gppc_version = "gppc_17test1";
const char * ch101_gppc_gitsha1 = "37dead873d3d05d76c6324a52c6676e6e8418cad";
#define RAM_INIT_ADDRESS 1982
#define RAM_INIT_WRITE_SIZE 12
uint16_t get_ch101_gppc_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gppc_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gppc_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x64, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gppc_init_ptr(void) { return &ram_ch101_gppc_init[0];}
const unsigned char ch101_gppc_fw[CH101_FW_SIZE] = {
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};

93
CHIRP/drivers/src/ch101_gpr.c Normal file
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/*! \file ch101_gpr.c
*
* \brief Chirp CH101 General Purpose Rangefinding firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr.h"
#include "ch_common.h"
uint8_t ch101_gpr_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_fw;
dev_ptr->fw_version_string = ch101_gpr_version;
dev_ptr->ram_init = get_ram_ch101_gpr_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
// /* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr.v43a.hex at 2021-02-04 14:08:05.318576 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr.h"
const char * ch101_gpr_version = "gpr_gpr-101_v43a";
const char * ch101_gpr_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2420
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_init_ptr(void) { return &ram_ch101_gpr_init[0];}
const unsigned char ch101_gpr_fw[CH101_FW_SIZE] = {
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};

156
CHIRP/drivers/src/ch101_gpr_lowpwr_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_lowpwr.v43a.hex at 2021-02-04 14:10:23.522677 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_lowpwr.h"
const char * ch101_gpr_lowpwr_version = "gpr_lowpwr_gpr-101_v43a";
const char * ch101_gpr_lowpwr_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2420
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_lowpwr_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_lowpwr_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_lowpwr_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_lowpwr_init_ptr(void) { return &ram_ch101_gpr_lowpwr_init[0];}
const unsigned char ch101_gpr_lowpwr_fw[CH101_FW_SIZE] = {
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};

93
CHIRP/drivers/src/ch101_gpr_narrow.c Normal file
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/*! \file ch101_gpr_narrow.c
*
* \brief Chirp CH101 General Purpose Rangefinding firmware interface (Narrow-FoV)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_narrow.h"
#include "ch_common.h"
uint8_t ch101_gpr_narrow_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_narrow_fw;
dev_ptr->fw_version_string = ch101_gpr_narrow_version;
dev_ptr->ram_init = get_ram_ch101_gpr_narrow_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_narrow_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_narrow_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_NARROW_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_narrow_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_narrow.v43a.hex at 2021-02-04 14:08:28.615151 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_narrow.h"
const char * ch101_gpr_narrow_version = "gpr_narrow_gpr-101_v43a";
const char * ch101_gpr_narrow_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2440
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_narrow_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_narrow_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_narrow_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_narrow_init_ptr(void) { return &ram_ch101_gpr_narrow_init[0];}
const unsigned char ch101_gpr_narrow_fw[CH101_FW_SIZE] = {
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};

93
CHIRP/drivers/src/ch101_gpr_narrow_wd.c Normal file
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@@ -0,0 +1,93 @@
/*! \file ch101_gpr_narrow_wd.c
*
* \brief Chirp CH101 General Purpose Rangefinding firmware interface (Narrow-FoV) (watchdog enabled)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_narrow_wd.h"
#include "ch_common.h"
uint8_t ch101_gpr_narrow_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_narrow_wd_fw;
dev_ptr->fw_version_string = ch101_gpr_narrow_wd_version;
dev_ptr->ram_init = get_ram_ch101_gpr_narrow_wd_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_narrow_wd_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_narrow_wd_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_NARROW_WD_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_narrow_wd_fw.c Normal file
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//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_narrow_wd.v43a.hex at 2021-02-04 14:08:40.706799 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_narrow_wd.h"
const char * ch101_gpr_narrow_wd_version = "gpr_narrow_wd_gpr-101_v43a";
const char * ch101_gpr_narrow_wd_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2440
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_narrow_wd_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_narrow_wd_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_narrow_wd_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_narrow_wd_init_ptr(void) { return &ram_ch101_gpr_narrow_wd_init[0];}
const unsigned char ch101_gpr_narrow_wd_fw[CH101_FW_SIZE] = {
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};

106
CHIRP/drivers/src/ch101_gpr_open.c Normal file
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/*! \file ch101_gpr_open.c
*
* \brief Chirp CH101 General Purpose Rangefinding (Open) firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_open.h"
#include "ch_common.h"
uint8_t ch101_gpr_open_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_open_fw;
dev_ptr->fw_version_string = ch101_gpr_open_version;
dev_ptr->ram_init = get_ram_ch101_gpr_open_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_open_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_open_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch101_gpr_open_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_OPEN_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
void ch101_gpr_open_store_pt_result(ch_dev_t *dev_ptr) {
uint16_t rtc_cal_result;
uint16_t calc_val;
uint32_t count;
chdrv_read_word(dev_ptr, CH101_GPR_OPEN_REG_CAL_RESULT, &rtc_cal_result);
count = (rtc_cal_result * 1000) / dev_ptr->group->rtc_cal_pulse_ms;
calc_val = (uint16_t)((uint32_t)CH101_GPR_OPEN_CTR * 16U * CH101_COMMON_FREQCOUNTERCYCLES / count);
chdrv_write_word(dev_ptr, CH101_GPR_OPEN_REG_CALC, calc_val);
dev_ptr->rtc_cal_result = rtc_cal_result;
}

157
CHIRP/drivers/src/ch101_gpr_open_fw.c Normal file
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@@ -0,0 +1,157 @@
//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 2.7.15)
// File generated from ch101_gpr_open_v40a.hex at 2020-07-16 18:39:38.449000 by klong
//
// Copyright @ 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_open.h"
const char * ch101_gpr_open_version = "gpr_open_gpr-101_v40a";
const char * ch101_gpr_open_gitsha1 = "da6fc6f919da98b36ef7ebb6ca920d6e30327162";
#define RAM_INIT_ADDRESS 1864
#define RAM_INIT_WRITE_SIZE 16
uint16_t get_ch101_gpr_open_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_open_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_open_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x00, 0x64, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00,
};
const unsigned char * get_ram_ch101_gpr_open_init_ptr(void) { return &ram_ch101_gpr_open_init[0];}
const unsigned char ch101_gpr_open_fw[CH101_FW_SIZE] = {
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};

92
CHIRP/drivers/src/ch101_gpr_rxopt.c Normal file
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@@ -0,0 +1,92 @@
/*! \file ch101_gpr_rxopt.c
*
* \brief Chirp CH101 General Purpose Rangefinding (Rx-optimized) firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_rxopt.h"
#include "ch_common.h"
uint8_t ch101_gpr_rxopt_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_rxopt_fw;
dev_ptr->fw_version_string = ch101_gpr_rxopt_version;
dev_ptr->ram_init = get_ram_ch101_gpr_rxopt_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_rxopt_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_rxopt_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_RXOPT_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_rxopt_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_rxopt.v43a.hex at 2021-02-04 14:09:39.119487 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_rxopt.h"
const char * ch101_gpr_rxopt_version = "gpr_rxopt_gpr-101_v43a";
const char * ch101_gpr_rxopt_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2420
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_rxopt_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_rxopt_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_rxopt_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_rxopt_init_ptr(void) { return &ram_ch101_gpr_rxopt_init[0];}
const unsigned char ch101_gpr_rxopt_fw[CH101_FW_SIZE] = {
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};

92
CHIRP/drivers/src/ch101_gpr_rxopt_narrow.c Normal file
View File

@@ -0,0 +1,92 @@
/*! \file ch101_gpr_rxopt_narrow.c
*
* \brief Chirp CH101 General Purpose Rangefinding (Rx-optimized) firmware interface (Narrow-Fov)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_rxopt_narrow.h"
#include "ch_common.h"
uint8_t ch101_gpr_rxopt_narrow_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_rxopt_narrow_fw;
dev_ptr->fw_version_string = ch101_gpr_rxopt_narrow_version;
dev_ptr->ram_init = get_ram_ch101_gpr_rxopt_narrow_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_rxopt_narrow_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_rxopt_narrow_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_RXOPT_NARROW_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_rxopt_narrow_fw.c Normal file
View File

@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_rxopt_narrow.v43a.hex at 2021-02-04 14:10:01.285771 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_rxopt_narrow.h"
const char * ch101_gpr_rxopt_narrow_version = "gpr_rxopt_narrow_gpr-101_v43a";
const char * ch101_gpr_rxopt_narrow_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2440
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_rxopt_narrow_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_rxopt_narrow_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_rxopt_narrow_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_rxopt_narrow_init_ptr(void) { return &ram_ch101_gpr_rxopt_narrow_init[0];}
const unsigned char ch101_gpr_rxopt_narrow_fw[CH101_FW_SIZE] = {
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};

92
CHIRP/drivers/src/ch101_gpr_rxopt_narrow_wd.c Normal file
View File

@@ -0,0 +1,92 @@
/*! \file ch101_gpr_rxopt_narrow_wd.c
*
* \brief Chirp CH101 General Purpose Rangefinding (Rx-optimized) firmware interface (Narrow-Fov) (watchdog enabled)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_rxopt_narrow_wd.h"
#include "ch_common.h"
uint8_t ch101_gpr_rxopt_narrow_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_rxopt_narrow_wd_fw;
dev_ptr->fw_version_string = ch101_gpr_rxopt_narrow_wd_version;
dev_ptr->ram_init = get_ram_ch101_gpr_rxopt_narrow_wd_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_rxopt_narrow_wd_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_rxopt_narrow_wd_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_RXOPT_NARROW_WD_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_rxopt_narrow_wd_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_rxopt_narrow_wd.v43a.hex at 2021-02-04 14:10:12.383363 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_rxopt_narrow_wd.h"
const char * ch101_gpr_rxopt_narrow_wd_version = "gpr_rxopt_narrow_wd_gpr-101_v43a";
const char * ch101_gpr_rxopt_narrow_wd_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2440
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_rxopt_narrow_wd_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_rxopt_narrow_wd_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_rxopt_narrow_wd_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_rxopt_narrow_wd_init_ptr(void) { return &ram_ch101_gpr_rxopt_narrow_wd_init[0];}
const unsigned char ch101_gpr_rxopt_narrow_wd_fw[CH101_FW_SIZE] = {
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};

92
CHIRP/drivers/src/ch101_gpr_rxopt_wd.c Normal file
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@@ -0,0 +1,92 @@
/*! \file ch101_gpr_rxopt_wd.c
*
* \brief Chirp CH101 General Purpose Rangefinding (Rx-optimized) firmware interface (watchdog enabled)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_rxopt_wd.h"
#include "ch_common.h"
uint8_t ch101_gpr_rxopt_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_rxopt_wd_fw;
dev_ptr->fw_version_string = ch101_gpr_rxopt_wd_version;
dev_ptr->ram_init = get_ram_ch101_gpr_rxopt_wd_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_rxopt_wd_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_rxopt_wd_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_RXOPT_WD_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_rxopt_wd_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_rxopt_wd.v43a.hex at 2021-02-04 14:09:50.397269 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_rxopt_wd.h"
const char * ch101_gpr_rxopt_wd_version = "gpr_rxopt_wd_gpr-101_v43a";
const char * ch101_gpr_rxopt_wd_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2420
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_rxopt_wd_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_rxopt_wd_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_rxopt_wd_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_rxopt_wd_init_ptr(void) { return &ram_ch101_gpr_rxopt_wd_init[0];}
const unsigned char ch101_gpr_rxopt_wd_fw[CH101_FW_SIZE] = {
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};

93
CHIRP/drivers/src/ch101_gpr_sr.c Normal file
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@@ -0,0 +1,93 @@
/*! \file ch101_gpr_sr.c
*
* \brief Chirp CH101 General Purpose Rangefinding / Short Range firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_sr.h"
#include "ch_common.h"
uint8_t ch101_gpr_sr_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_sr_fw;
dev_ptr->fw_version_string = ch101_gpr_sr_version;
dev_ptr->ram_init = get_ram_ch101_gpr_sr_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_sr_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_sr_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = NULL;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_SR_MAX_SAMPLES;
/* This firmware uses oversampling */
dev_ptr->oversample = 2; // 4x oversampling (value is power of 2)
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_sr_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_sr.v43a.hex at 2021-02-04 14:08:51.805083 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_sr.h"
const char * ch101_gpr_sr_version = "gpr_sr_gpr-101_v43a";
const char * ch101_gpr_sr_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2108
#define RAM_INIT_WRITE_SIZE 15
uint16_t get_ch101_gpr_sr_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_sr_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_sr_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_sr_init_ptr(void) { return &ram_ch101_gpr_sr_init[0];}
const unsigned char ch101_gpr_sr_fw[CH101_FW_SIZE] = {
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};

93
CHIRP/drivers/src/ch101_gpr_sr_narrow.c Normal file
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@@ -0,0 +1,93 @@
/*! \file ch101_gpr_sr_narrow.c
*
* \brief Chirp CH101 General Purpose Rangefinding / Short Range Narrow-FoV firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_sr_narrow.h"
#include "ch_common.h"
uint8_t ch101_gpr_sr_narrow_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_sr_narrow_fw;
dev_ptr->fw_version_string = ch101_gpr_sr_narrow_version;
dev_ptr->ram_init = get_ram_ch101_gpr_sr_narrow_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_sr_narrow_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_sr_narrow_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = NULL;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_SR_NARROW_MAX_SAMPLES;
/* This firmware uses oversampling */
dev_ptr->oversample = 2; // 4x oversampling (value is power of 2)
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_sr_narrow_fw.c Normal file
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//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_sr_narrow.v43a.hex at 2021-02-04 14:09:15.806879 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_sr_narrow.h"
const char * ch101_gpr_sr_narrow_version = "gpr_sr_narrow_gpr-101_v43a";
const char * ch101_gpr_sr_narrow_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2204
#define RAM_INIT_WRITE_SIZE 15
uint16_t get_ch101_gpr_sr_narrow_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_sr_narrow_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_sr_narrow_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_sr_narrow_init_ptr(void) { return &ram_ch101_gpr_sr_narrow_init[0];}
const unsigned char ch101_gpr_sr_narrow_fw[CH101_FW_SIZE] = {
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};

93
CHIRP/drivers/src/ch101_gpr_sr_narrow_wd.c Normal file
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@@ -0,0 +1,93 @@
/*! \file ch101_gpr_sr_narrow_wd.c
*
* \brief Chirp CH101 General Purpose Rangefinding / Short Range Narrow-FoV firmware interface (watchdog enabled)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_sr_narrow_wd.h"
#include "ch_common.h"
uint8_t ch101_gpr_sr_narrow_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_sr_narrow_wd_fw;
dev_ptr->fw_version_string = ch101_gpr_sr_narrow_wd_version;
dev_ptr->ram_init = get_ram_ch101_gpr_sr_narrow_wd_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_sr_narrow_wd_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_sr_narrow_wd_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = NULL;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_SR_NARROW_WD_MAX_SAMPLES;
/* This firmware uses oversampling */
dev_ptr->oversample = 2; // 4x oversampling (value is power of 2)
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_sr_narrow_wd_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_sr_narrow_wd.v43a.hex at 2021-02-04 14:09:27.144705 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_sr_narrow_wd.h"
const char * ch101_gpr_sr_narrow_wd_version = "gpr_sr_narrow_wd_gpr-101_v43a";
const char * ch101_gpr_sr_narrow_wd_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2204
#define RAM_INIT_WRITE_SIZE 15
uint16_t get_ch101_gpr_sr_narrow_wd_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_sr_narrow_wd_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_sr_narrow_wd_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_sr_narrow_wd_init_ptr(void) { return &ram_ch101_gpr_sr_narrow_wd_init[0];}
const unsigned char ch101_gpr_sr_narrow_wd_fw[CH101_FW_SIZE] = {
0x0a, 0x12, 0x09, 0x12, 0x08, 0x12, 0x07, 0x12, 0x06, 0x12, 0x05, 0x12, 0x04, 0x12, 0x07, 0x4d,
0xc2, 0x43, 0x8c, 0x08, 0x08, 0x43, 0x0b, 0x43, 0x0c, 0x93, 0x73, 0x24, 0x04, 0x4c, 0x0a, 0x43,
0x35, 0x40, 0x70, 0x17, 0x0c, 0x43, 0x47, 0x93, 0x16, 0x20, 0x3a, 0x90, 0x88, 0x00, 0x1e, 0x2c,
0xf2, 0x90, 0x20, 0x00, 0x01, 0x02, 0x1a, 0x24, 0x0f, 0x4a, 0x0f, 0x5c, 0x0f, 0x5f, 0x3e, 0x40,
0x1c, 0x02, 0x0e, 0x5f, 0x29, 0x4e, 0x3d, 0x40, 0x62, 0x07, 0x0d, 0x5f, 0xae, 0x8d, 0x00, 0x00,
0x8d, 0x49, 0x00, 0x00, 0x0b, 0x3c, 0x57, 0x93, 0x09, 0x20, 0x3a, 0x90, 0x88, 0x00, 0x06, 0x2c,
0x0f, 0x4a, 0x0f, 0x5c, 0x0f, 0x5f, 0x9f, 0x4f, 0x1c, 0x02, 0x62, 0x07, 0x1c, 0x53, 0x2c, 0x93,
0xda, 0x2b, 0x47, 0x93, 0x42, 0x20, 0x56, 0x42, 0x8c, 0x08, 0x0f, 0x4a, 0x0f, 0x5f, 0x3f, 0x50,
0x1c, 0x02, 0x09, 0x4b, 0x09, 0x59, 0x39, 0x50, 0xa0, 0x05, 0x3a, 0x90, 0x5a, 0x00, 0x02, 0x20,
0x35, 0x40, 0x58, 0x02, 0x3a, 0x90, 0x98, 0x00, 0x02, 0x20, 0x35, 0x40, 0xc2, 0x01, 0x2c, 0x4f,
0x0f, 0x4a, 0x0f, 0x5f, 0x2f, 0x53, 0x1d, 0x4f, 0x1c, 0x02, 0xb0, 0x12, 0x82, 0xfe, 0x89, 0x4c,
0x00, 0x00, 0x46, 0x93, 0x11, 0x20, 0x05, 0x9c, 0x0f, 0x2c, 0x5f, 0x42, 0x11, 0x02, 0x0f, 0x9b,
0x0b, 0x2c, 0x08, 0x93, 0x1a, 0x20, 0x4c, 0x46, 0x3d, 0x40, 0x06, 0x00, 0xb0, 0x12, 0xdc, 0xfe,
0xcc, 0x4b, 0x80, 0x08, 0x18, 0x43, 0x11, 0x3c, 0x08, 0x93, 0x0f, 0x24, 0x4c, 0x46, 0x3d, 0x40,
0x06, 0x00, 0xb0, 0x12, 0xdc, 0xfe, 0x3c, 0x50, 0x80, 0x08, 0x0f, 0x4b, 0x6f, 0x8c, 0x5f, 0x83,
0xcc, 0x4f, 0x01, 0x00, 0xd2, 0x53, 0x8c, 0x08, 0x08, 0x43, 0x2a, 0x53, 0x1b, 0x53, 0x14, 0x83,
0x91, 0x23, 0x5c, 0x42, 0x8c, 0x08, 0x08, 0x93, 0x0f, 0x24, 0x4c, 0x4c, 0x3d, 0x40, 0x06, 0x00,
0xb0, 0x12, 0xdc, 0xfe, 0x3c, 0x50, 0x80, 0x08, 0x6b, 0x8c, 0x5b, 0x83, 0xcc, 0x4b, 0x01, 0x00,
0xd2, 0x53, 0x8c, 0x08, 0x5c, 0x42, 0x8c, 0x08, 0x4c, 0x93, 0x42, 0x24, 0x5d, 0x42, 0x80, 0x08,
0x4f, 0x4d, 0x0f, 0x5f, 0x1a, 0x4f, 0xa0, 0x05, 0x5b, 0x42, 0x81, 0x08, 0x6b, 0x93, 0x0d, 0x28,
0x4f, 0x4d, 0x0f, 0x5f, 0x3f, 0x50, 0xa2, 0x05, 0x4e, 0x4b, 0x1e, 0x83, 0x2c, 0x4f, 0x0c, 0x9a,
0x04, 0x28, 0x0a, 0x4c, 0x2f, 0x53, 0x1e, 0x83, 0xf9, 0x23, 0x82, 0x4a, 0x82, 0x08, 0x4f, 0x4d,
0x0e, 0x4a, 0x12, 0xc3, 0x0e, 0x10, 0x4c, 0x4b, 0x4b, 0x93, 0x02, 0x20, 0x0b, 0x43, 0x0c, 0x3c,
0x0f, 0x5f, 0x3f, 0x50, 0xa0, 0x05, 0x0b, 0x43, 0x2e, 0x9f, 0x05, 0x28, 0x2f, 0x53, 0x1b, 0x53,
0x1c, 0x83, 0xfa, 0x23, 0x01, 0x3c, 0x5b, 0x83, 0x4b, 0x5d, 0x4f, 0x4b, 0x0f, 0x5f, 0x1c, 0x4f,
0xa0, 0x05, 0x1d, 0x4f, 0xa2, 0x05, 0xb0, 0x12, 0xaa, 0xfe, 0x4f, 0x4c, 0x4c, 0x4b, 0x4c, 0x4c,
0x8c, 0x10, 0x0c, 0xdf, 0x82, 0x4c, 0x18, 0x02, 0x82, 0x4a, 0x1a, 0x02, 0x30, 0x40, 0x24, 0xff,
0xb2, 0x43, 0x18, 0x02, 0x30, 0x40, 0x24, 0xff, 0x0f, 0x12, 0x0e, 0x12, 0x0d, 0x12, 0x0c, 0x12,
0x0b, 0x12, 0xd2, 0xc3, 0xa9, 0x08, 0xc2, 0x93, 0x14, 0x02, 0x3d, 0x20, 0x1b, 0x43, 0x1c, 0x42,
0x2e, 0x02, 0x1d, 0x42, 0x2c, 0x02, 0xb0, 0x12, 0x82, 0xfe, 0x1c, 0x92, 0xa4, 0x08, 0x1a, 0x28,
0x1f, 0x42, 0x2e, 0x02, 0x0f, 0x11, 0x0f, 0x11, 0x1f, 0x82, 0x2c, 0x02, 0x1f, 0x93, 0x02, 0x38,
0x3f, 0x43, 0x01, 0x3c, 0x1f, 0x43, 0xc2, 0x93, 0xa6, 0x08, 0x07, 0x24, 0x5e, 0x42, 0xa6, 0x08,
0x8e, 0x11, 0x0f, 0x9e, 0x02, 0x24, 0x0b, 0x43, 0x02, 0x3c, 0x82, 0x5f, 0x0e, 0x02, 0xc2, 0x4f,
0xa6, 0x08, 0x0f, 0x3c, 0xb2, 0x50, 0x14, 0x00, 0x0e, 0x02, 0xb2, 0x90, 0x2d, 0x01, 0x0e, 0x02,
0x06, 0x28, 0xb2, 0x80, 0xc8, 0x00, 0x0e, 0x02, 0x12, 0xc3, 0x12, 0x10, 0xa4, 0x08, 0xc2, 0x43,
0xa6, 0x08, 0x0b, 0x93, 0x55, 0x20, 0xd2, 0x43, 0x14, 0x02, 0xb2, 0x40, 0x07, 0x34, 0x92, 0x08,
0xd2, 0x43, 0x0c, 0x02, 0x4d, 0x3c, 0xd2, 0x93, 0x14, 0x02, 0x48, 0x20, 0xf2, 0x90, 0x03, 0x00,
0x99, 0x08, 0x06, 0x24, 0xc2, 0x93, 0x99, 0x08, 0x30, 0x24, 0xd2, 0x83, 0x99, 0x08, 0x2d, 0x3c,
0xf2, 0x90, 0x20, 0x00, 0x01, 0x02, 0x29, 0x24, 0x1c, 0x42, 0x36, 0x02, 0x1d, 0x42, 0x34, 0x02,
0xb0, 0x12, 0x82, 0xfe, 0x82, 0x9c, 0xa2, 0x08, 0x18, 0x2c, 0x3e, 0x40, 0x0c, 0x02, 0x5f, 0x42,
0x9c, 0x08, 0x0f, 0x5e, 0xdf, 0x83, 0x00, 0x00, 0xd2, 0x93, 0x9c, 0x08, 0x0b, 0x24, 0xb2, 0x40,
0xe8, 0xfd, 0xa2, 0x08, 0xd2, 0x53, 0x9c, 0x08, 0x5f, 0x42, 0x9c, 0x08, 0x0e, 0x5f, 0xde, 0x43,
0x00, 0x00, 0x0b, 0x3c, 0xe2, 0x43, 0x99, 0x08, 0x08, 0x3c, 0x82, 0x4c, 0xa2, 0x08, 0x5f, 0x42,
0x9c, 0x08, 0x3f, 0x50, 0x0c, 0x02, 0xdf, 0x53, 0x00, 0x00, 0xe2, 0x93, 0x99, 0x08, 0x0b, 0x24,
0xc2, 0x93, 0x99, 0x08, 0x0d, 0x20, 0xe2, 0x43, 0x14, 0x02, 0xe2, 0xd3, 0xa9, 0x08, 0xb2, 0x40,
0x80, 0x10, 0xd0, 0x01, 0x05, 0x3c, 0xd2, 0x43, 0x01, 0x02, 0x02, 0x3c, 0x82, 0x43, 0xf0, 0x01,
0xf2, 0x90, 0x03, 0x00, 0x99, 0x08, 0x06, 0x2c, 0x5c, 0x42, 0x07, 0x02, 0x5d, 0x42, 0x99, 0x08,
0xb0, 0x12, 0x00, 0xf8, 0x92, 0x42, 0x0e, 0x02, 0xf0, 0x01, 0xe2, 0x93, 0x14, 0x02, 0x12, 0x28,
0xd2, 0xd3, 0xe0, 0x01, 0xd2, 0xc3, 0xe0, 0x01, 0xd2, 0xb3, 0xa9, 0x08, 0x10, 0x20, 0xb2, 0x40,
0x77, 0x06, 0xa6, 0x01, 0x3c, 0x40, 0x3c, 0x00, 0xb0, 0x12, 0x34, 0xff, 0xb2, 0x40, 0x77, 0x01,
0xa6, 0x01, 0x05, 0x3c, 0x5c, 0x43, 0xb0, 0x12, 0x24, 0xfc, 0xa2, 0xc2, 0x92, 0x01, 0xa2, 0xd2,
0x92, 0x01, 0xd2, 0x42, 0x96, 0x08, 0xe0, 0x01, 0xb2, 0x40, 0x08, 0x5a, 0x20, 0x01, 0xb1, 0xc0,
0xf0, 0x00, 0x0a, 0x00, 0x3b, 0x41, 0x3c, 0x41, 0x3d, 0x41, 0x3e, 0x41, 0x3f, 0x41, 0x00, 0x13,
0xb2, 0x40, 0x18, 0x5a, 0x20, 0x01, 0xd2, 0xd3, 0x00, 0x00, 0xe2, 0x42, 0xe0, 0x01, 0xd2, 0x43,
0xe2, 0x01, 0xf2, 0x40, 0x40, 0x00, 0x01, 0x02, 0xf2, 0x40, 0x78, 0x00, 0x07, 0x02, 0xb2, 0x40,
0x64, 0x00, 0x0e, 0x02, 0xc2, 0x43, 0x00, 0x02, 0xd2, 0x43, 0x05, 0x02, 0xf2, 0x40, 0x0a, 0x00,
0x11, 0x02, 0xb2, 0x40, 0x00, 0x01, 0x02, 0x02, 0xf2, 0x40, 0x03, 0x00, 0xc2, 0x01, 0xb2, 0x40,
0x00, 0x02, 0xa6, 0x01, 0xb2, 0x40, 0x00, 0x06, 0xa6, 0x01, 0xb2, 0x40, 0x00, 0x3c, 0x8e, 0x08,
0xb2, 0x40, 0x00, 0x18, 0x90, 0x08, 0xb2, 0x40, 0x1c, 0x02, 0xb0, 0x01, 0x3f, 0x40, 0x07, 0x00,
0x82, 0x4f, 0xb2, 0x01, 0xb2, 0x40, 0x77, 0x01, 0xa6, 0x01, 0xb2, 0x40, 0x00, 0x01, 0x90, 0x01,
0x82, 0x4f, 0x92, 0x01, 0x0d, 0x43, 0x02, 0x3c, 0x32, 0xd0, 0x58, 0x00, 0x5f, 0x42, 0x01, 0x02,
0x0d, 0x9f, 0x20, 0x24, 0x5d, 0x42, 0x01, 0x02, 0x0f, 0x4d, 0x3f, 0x80, 0x10, 0x00, 0x18, 0x24,
0x3f, 0x80, 0x10, 0x00, 0x15, 0x24, 0x3f, 0x80, 0x20, 0x00, 0x0d, 0x20, 0xc2, 0x43, 0x14, 0x02,
0xe2, 0x42, 0x99, 0x08, 0xb2, 0x40, 0x07, 0x18, 0x92, 0x08, 0x92, 0x42, 0x0e, 0x02, 0xf0, 0x01,
0x5c, 0x43, 0xb0, 0x12, 0x24, 0xfc, 0xe2, 0x42, 0x96, 0x08, 0xe2, 0xc3, 0xe0, 0x01, 0x02, 0x3c,
0xe2, 0xd3, 0xe0, 0x01, 0x32, 0xc2, 0x03, 0x43, 0xc2, 0x93, 0xa9, 0x08, 0xd5, 0x27, 0x32, 0xd0,
0x18, 0x00, 0xd4, 0x3f, 0x0e, 0x4c, 0xd2, 0xd3, 0xa9, 0x08, 0xf2, 0x90, 0x40, 0x00, 0x01, 0x02,
0x24, 0x24, 0xd2, 0x92, 0x07, 0x02, 0xa0, 0x08, 0x25, 0x24, 0xd2, 0x42, 0x07, 0x02, 0xa0, 0x08,
0x5f, 0x42, 0x07, 0x02, 0x3f, 0x80, 0x10, 0x00, 0xb2, 0x40, 0x02, 0x44, 0x72, 0x08, 0xf2, 0x90,
0x20, 0x00, 0x01, 0x02, 0x02, 0x20, 0x2c, 0x42, 0x01, 0x3c, 0x2c, 0x43, 0xb0, 0x12, 0x68, 0xfe,
0x3c, 0x50, 0x1e, 0x0c, 0x82, 0x4c, 0x74, 0x08, 0x3f, 0x50, 0x00, 0x26, 0x0f, 0x5f, 0x82, 0x4f,
0x76, 0x08, 0xf2, 0x40, 0x03, 0x00, 0x9a, 0x08, 0x05, 0x3c, 0xb2, 0x40, 0x40, 0x18, 0x72, 0x08,
0xd2, 0x43, 0x9a, 0x08, 0x4e, 0x93, 0x04, 0x20, 0xb2, 0x40, 0x82, 0x10, 0xa2, 0x01, 0x03, 0x3c,
0xb2, 0x40, 0x86, 0x10, 0xa2, 0x01, 0x5f, 0x42, 0x9a, 0x08, 0x0f, 0x93, 0x06, 0x24, 0x3e, 0x40,
0x72, 0x08, 0xb2, 0x4e, 0xa4, 0x01, 0x1f, 0x83, 0xfc, 0x23, 0x92, 0x42, 0x92, 0x08, 0xa0, 0x01,
0xc2, 0x93, 0x14, 0x02, 0x05, 0x24, 0xb2, 0xd0, 0x10, 0x00, 0xa2, 0x01, 0xc2, 0x43, 0x98, 0x08,
0xb2, 0xd0, 0x00, 0x08, 0xa2, 0x01, 0x92, 0x43, 0xae, 0x01, 0xa2, 0x43, 0xae, 0x01, 0x30, 0x41,
0x0f, 0x12, 0x5f, 0x42, 0xaa, 0x08, 0x0f, 0x93, 0x15, 0x24, 0x1f, 0x83, 0x26, 0x24, 0x1f, 0x83,
0x29, 0x20, 0xb2, 0x90, 0x16, 0x00, 0x94, 0x08, 0x07, 0x2c, 0x1f, 0x42, 0x94, 0x08, 0xdf, 0x42,
0xc1, 0x01, 0x00, 0x02, 0x92, 0x53, 0x94, 0x08, 0xd2, 0x83, 0x97, 0x08, 0x1b, 0x20, 0xc2, 0x43,
0xaa, 0x08, 0x18, 0x3c, 0x5f, 0x42, 0xc1, 0x01, 0x82, 0x4f, 0x94, 0x08, 0xd2, 0x43, 0xaa, 0x08,
0xd2, 0x4f, 0x00, 0x02, 0xc0, 0x01, 0x3f, 0x90, 0x06, 0x00, 0x0c, 0x20, 0xf2, 0x40, 0x24, 0x00,
0xe0, 0x01, 0xb2, 0x40, 0x03, 0x00, 0xd8, 0x01, 0x05, 0x3c, 0xd2, 0x42, 0xc1, 0x01, 0x97, 0x08,
0xe2, 0x43, 0xaa, 0x08, 0xf2, 0xd0, 0x10, 0x00, 0xc2, 0x01, 0xf2, 0xd0, 0x20, 0x00, 0xc2, 0x01,
0xb1, 0xc0, 0xf0, 0x00, 0x02, 0x00, 0x3f, 0x41, 0x00, 0x13, 0x0f, 0x12, 0x0e, 0x12, 0x0d, 0x12,
0x0c, 0x12, 0x0b, 0x12, 0x92, 0x42, 0x02, 0x02, 0x90, 0x01, 0xe2, 0x93, 0x01, 0x02, 0x03, 0x20,
0xd2, 0x83, 0xa8, 0x08, 0x14, 0x24, 0xd2, 0xb3, 0xa9, 0x08, 0x0a, 0x20, 0xb2, 0x40, 0x77, 0x06,
0xa6, 0x01, 0x3c, 0x40, 0x3c, 0x00, 0xb0, 0x12, 0x34, 0xff, 0xb2, 0x40, 0x77, 0x01, 0xa6, 0x01,
0xc2, 0x93, 0x01, 0x02, 0x0a, 0x20, 0xb2, 0x40, 0x08, 0x5a, 0x20, 0x01, 0x06, 0x3c, 0xd2, 0x42,
0x05, 0x02, 0xa8, 0x08, 0x5c, 0x43, 0xb0, 0x12, 0x24, 0xfc, 0xb1, 0xc0, 0xf0, 0x00, 0x0a, 0x00,
0x3b, 0x41, 0x3c, 0x41, 0x3d, 0x41, 0x3e, 0x41, 0x3f, 0x41, 0x00, 0x13, 0x0f, 0x12, 0x0e, 0x12,
0x0d, 0x12, 0x0c, 0x12, 0x0b, 0x12, 0xe2, 0xb3, 0xe0, 0x01, 0x12, 0x24, 0xd2, 0x42, 0xe0, 0x01,
0x96, 0x08, 0xe2, 0xc3, 0xe0, 0x01, 0xa2, 0xc2, 0x92, 0x01, 0x4c, 0x43, 0xf2, 0x90, 0x20, 0x00,
0x01, 0x02, 0x01, 0x24, 0x5c, 0x43, 0xb0, 0x12, 0x24, 0xfc, 0xb1, 0xc0, 0xf0, 0x00, 0x0a, 0x00,
0x3b, 0x41, 0x3c, 0x41, 0x3d, 0x41, 0x3e, 0x41, 0x3f, 0x41, 0x00, 0x13, 0x0f, 0x12, 0x0e, 0x12,
0x5e, 0x42, 0x98, 0x08, 0x0e, 0x5e, 0x5f, 0x42, 0x98, 0x08, 0x5f, 0x4f, 0x0c, 0x02, 0x1f, 0x5e,
0x8e, 0x08, 0x82, 0x4f, 0xa0, 0x01, 0xd2, 0x92, 0x9c, 0x08, 0x98, 0x08, 0x03, 0x20, 0xb2, 0xf0,
0xef, 0xff, 0xa2, 0x01, 0xd2, 0x53, 0x98, 0x08, 0xb1, 0xc0, 0xf0, 0x00, 0x04, 0x00, 0x3e, 0x41,
0x3f, 0x41, 0x00, 0x13, 0x0f, 0x12, 0xc2, 0x43, 0xaa, 0x08, 0x92, 0x53, 0x94, 0x08, 0xb2, 0x90,
0xa0, 0x03, 0x94, 0x08, 0x03, 0x28, 0x82, 0x43, 0x94, 0x08, 0x05, 0x3c, 0x1f, 0x42, 0x94, 0x08,
0xd2, 0x4f, 0x00, 0x02, 0xc0, 0x01, 0xf2, 0xd0, 0x20, 0x00, 0xc2, 0x01, 0xb1, 0xc0, 0xf0, 0x00,
0x02, 0x00, 0x3f, 0x41, 0x00, 0x13, 0x3d, 0xf0, 0x0f, 0x00, 0x3d, 0xe0, 0x0f, 0x00, 0x0d, 0x5d,
0x00, 0x5d, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c,
0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c, 0x0c, 0x5c,
0x30, 0x41, 0x1c, 0x93, 0x02, 0x34, 0x3c, 0xe3, 0x1c, 0x53, 0x0f, 0x4c, 0x1d, 0x93, 0x02, 0x34,
0x3d, 0xe3, 0x1d, 0x53, 0x0c, 0x4d, 0x0c, 0x9f, 0x03, 0x2c, 0x0e, 0x4c, 0x0c, 0x4f, 0x0f, 0x4e,
0x12, 0xc3, 0x0f, 0x10, 0x0f, 0x11, 0x0c, 0x5f, 0x30, 0x41, 0x0e, 0x8c, 0x0e, 0x5e, 0x0d, 0x8c,
0x3f, 0x42, 0x4c, 0x43, 0x4c, 0x5c, 0x0d, 0x9e, 0x02, 0x2c, 0x0e, 0x8d, 0x5c, 0x53, 0x0e, 0x5e,
0x1f, 0x83, 0xf8, 0x23, 0x30, 0x41, 0x92, 0x42, 0xda, 0x01, 0x0a, 0x02, 0x82, 0x43, 0xd8, 0x01,
0xe2, 0x42, 0xe0, 0x01, 0xb1, 0xc0, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x13, 0x0e, 0x43, 0x12, 0xc3,
0x0c, 0x10, 0x01, 0x28, 0x0e, 0x5d, 0x0d, 0x5d, 0x0c, 0x93, 0xf9, 0x23, 0x0c, 0x4e, 0x30, 0x41,
0x31, 0x40, 0x00, 0x0a, 0xb0, 0x12, 0x4a, 0xff, 0x0c, 0x43, 0xb0, 0x12, 0x50, 0xfb, 0xb0, 0x12,
0x4e, 0xff, 0xe2, 0xc3, 0xa9, 0x08, 0x92, 0x42, 0xd2, 0x01, 0x16, 0x02, 0xb1, 0xc0, 0xf0, 0x00,
0x00, 0x00, 0x00, 0x13, 0xd2, 0xd3, 0xe0, 0x01, 0xe2, 0xc2, 0xe0, 0x01, 0xb1, 0xc0, 0xf0, 0x00,
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};

106
CHIRP/drivers/src/ch101_gpr_sr_open.c Normal file
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/*! \file ch101_gpr_sr_open.c
*
* \brief Chirp CH101 General Purpose Rangefinding / Short Range (Open) firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_sr_open.h"
#include "ch_common.h"
uint8_t ch101_gpr_sr_open_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_sr_open_fw;
dev_ptr->fw_version_string = ch101_gpr_sr_open_version;
dev_ptr->ram_init = get_ram_ch101_gpr_sr_open_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_sr_open_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_sr_open_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch101_gpr_sr_open_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = NULL;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_SR_OPEN_MAX_SAMPLES;
/* This firmware uses oversampling */
dev_ptr->oversample = 2; // 4x oversampling (value is power of 2)
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
void ch101_gpr_sr_open_store_pt_result(ch_dev_t *dev_ptr) {
uint16_t rtc_cal_result;
uint16_t calc_val;
uint32_t count;
chdrv_read_word(dev_ptr, CH101_GPR_SR_OPEN_REG_CAL_RESULT, &rtc_cal_result);
count = (rtc_cal_result * 1000) / dev_ptr->group->rtc_cal_pulse_ms;
calc_val = (uint16_t)((uint32_t)CH101_GPR_SR_OPEN_CTR * 16U * CH101_COMMON_FREQCOUNTERCYCLES / count);
chdrv_write_word(dev_ptr, CH101_GPR_SR_OPEN_REG_CALC, calc_val);
dev_ptr->rtc_cal_result = rtc_cal_result;
}

157
CHIRP/drivers/src/ch101_gpr_sr_open_fw.c Normal file
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@@ -0,0 +1,157 @@
//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 2.7.15)
// File generated from ch101_gpr_sr_open_v40a.hex at 2020-07-16 19:14:58.843000 by klong
//
// Copyright @ 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_sr_open.h"
const char * ch101_gpr_sr_open_version = "gpr_sr_open_gpr-101_v40a";
const char * ch101_gpr_sr_open_gitsha1 = "da6fc6f919da98b36ef7ebb6ca920d6e30327162";
#define RAM_INIT_ADDRESS 1660
#define RAM_INIT_WRITE_SIZE 18
uint16_t get_ch101_gpr_sr_open_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_sr_open_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_sr_open_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x00, 0x64, 0x00, 0x00, 0x0C, 0x00, 0x00,
0x01, 0x00, };
const unsigned char * get_ram_ch101_gpr_sr_open_init_ptr(void) { return &ram_ch101_gpr_sr_open_init[0];}
const unsigned char ch101_gpr_sr_open_fw[CH101_FW_SIZE] = {
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};

93
CHIRP/drivers/src/ch101_gpr_sr_wd.c Normal file
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@@ -0,0 +1,93 @@
/*! \file ch101_gpr_sr_wd.c
*
* \brief Chirp CH101 General Purpose Rangefinding / Short Range firmware interface (watchdog enabled)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_sr_wd.h"
#include "ch_common.h"
uint8_t ch101_gpr_sr_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_sr_wd_fw;
dev_ptr->fw_version_string = ch101_gpr_sr_wd_version;
dev_ptr->ram_init = get_ram_ch101_gpr_sr_wd_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_sr_wd_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_sr_wd_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = NULL;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_SR_WD_MAX_SAMPLES;
/* This firmware uses oversampling */
dev_ptr->oversample = 2; // 4x oversampling (value is power of 2)
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_sr_wd_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_sr_wd.v43a.hex at 2021-02-04 14:09:03.299494 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_sr_wd.h"
const char * ch101_gpr_sr_wd_version = "gpr_sr_wd_gpr-101_v43a";
const char * ch101_gpr_sr_wd_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2108
#define RAM_INIT_WRITE_SIZE 15
uint16_t get_ch101_gpr_sr_wd_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_sr_wd_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_sr_wd_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_sr_wd_init_ptr(void) { return &ram_ch101_gpr_sr_wd_init[0];}
const unsigned char ch101_gpr_sr_wd_fw[CH101_FW_SIZE] = {
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};

93
CHIRP/drivers/src/ch101_gpr_wd.c Normal file
View File

@@ -0,0 +1,93 @@
/*! \file ch101_gpr_wd.c
*
* \brief Chirp CH101 General Purpose Rangefinding firmware interface (watchdog enabled)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_gpr_wd.h"
#include "ch_common.h"
uint8_t ch101_gpr_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_gpr_wd_fw;
dev_ptr->fw_version_string = ch101_gpr_wd_version;
dev_ptr->ram_init = get_ram_ch101_gpr_wd_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_gpr_wd_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_gpr_wd_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_cal_result = ch_common_set_cal_result;
dev_ptr->api_funcs.get_cal_result = ch_common_get_cal_result;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_WD_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

156
CHIRP/drivers/src/ch101_gpr_wd_fw.c Normal file
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@@ -0,0 +1,156 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.gpr_wd.v43a.hex at 2021-02-04 14:08:17.262118 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_gpr_wd.h"
const char * ch101_gpr_wd_version = "gpr_wd_gpr-101_v43a";
const char * ch101_gpr_wd_gitsha1 = "b94d9640060b12396993f62109fd0e9076d981f7";
#define RAM_INIT_ADDRESS 2420
#define RAM_INIT_WRITE_SIZE 13
uint16_t get_ch101_gpr_wd_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_gpr_wd_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_gpr_wd_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, 0x00, };
const unsigned char * get_ram_ch101_gpr_wd_init_ptr(void) { return &ram_ch101_gpr_wd_init[0];}
const unsigned char ch101_gpr_wd_fw[CH101_FW_SIZE] = {
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};

94
CHIRP/drivers/src/ch101_liquid.c Normal file
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@@ -0,0 +1,94 @@
/*! \file ch101_liquid.c
*
* \brief Chirp CH101 Liquid Level Sensing firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2021, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch101_liquid.h"
#include "ch_common.h"
#include "ch_math_utils.h"
uint8_t ch101_liquid_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH101_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH101_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_liquid_fw;
dev_ptr->fw_version_string = ch101_liquid_version;
dev_ptr->ram_init = get_ram_ch101_liquid_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_liquid_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_liquid_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = NULL;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = NULL;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_amplitude_avg = NULL;
dev_ptr->api_funcs.set_sample_window = NULL;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = NULL; // Not supported
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
/* Init max sample count */
dev_ptr->max_samples = CH101_LIQUID_MAX_SAMPLES;
/* This firmware uses oversampling */
dev_ptr->oversample = 2; // 4x oversampling (value is power of 2)
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

157
CHIRP/drivers/src/ch101_liquid_fw.c Normal file
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@@ -0,0 +1,157 @@
//
// Chirp Microsystems Firmware Header Generator v2.1 (Python 3.7.7)
// File generated from release/invn.chirpmicro.asic.ch101.liquid.v1.hex at 2021-01-25 15:54:06.548210 by jenkins
//
// Copyright (c) 2021, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch101.h"
#include "ch101_liquid.h"
const char * ch101_liquid_version = "liquid_liquid-101_v1";
const char * ch101_liquid_gitsha1 = "aa61f064c37e8451846fa1978c6089987c51a6ff";
#define RAM_INIT_ADDRESS 1924
#define RAM_INIT_WRITE_SIZE 18
uint16_t get_ch101_liquid_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_liquid_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_liquid_init[RAM_INIT_WRITE_SIZE] = {
0x02, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0xFA, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00,
0x00, 0x01, };
const unsigned char * get_ram_ch101_liquid_init_ptr(void) { return &ram_ch101_liquid_init[0];}
const unsigned char ch101_liquid_fw[CH101_FW_SIZE] = {
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};

129
CHIRP/drivers/src/ch101_sonicsync.c Normal file
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@@ -0,0 +1,129 @@
#include "soniclib.h"
#include "ch101_sonicsync.h"
#include "ch_common.h"
uint8_t ch101_sonicsync_master_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_sonicsync_master_fw;
dev_ptr->fw_version_string = ch101_sonicsync_master_version;
dev_ptr->ram_init = get_ram_ch101_sonicsync_master_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_sonicsync_master_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_sonicsync_master_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_sonicsync_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_time_plan = ch_common_set_time_plan;
dev_ptr->api_funcs.get_time_plan = ch_common_get_time_plan;
/* Init max sample count */
dev_ptr->max_samples = CH101_SONICSYNC_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
uint8_t ch101_sonicsync_slave_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH101_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch101_sonicsync_slave_fw;
dev_ptr->fw_version_string = ch101_sonicsync_slave_version;
dev_ptr->ram_init = get_ram_ch101_sonicsync_slave_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch101_sonicsync_slave_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch101_sonicsync_slave_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_sonicsync_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = ch_common_set_static_range;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
dev_ptr->api_funcs.set_time_plan = ch_common_set_time_plan;
dev_ptr->api_funcs.get_time_plan = ch_common_get_time_plan;
/* Init max sample count */
dev_ptr->max_samples = CH101_GPR_OPEN_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
uint8_t ch_sonicsync_get_locked_state(ch_dev_t *dev_ptr) {
uint8_t ready_reg;
uint8_t lock_mask;
uint8_t ret_val = 0;
if (dev_ptr->part_number == CH201_PART_NUMBER) {
return ret_val; // NOT SUPPORTED in CH201
}
if (dev_ptr->part_number == CH101_PART_NUMBER) {
ready_reg = CH101_COMMON_REG_READY;
lock_mask = CH101_SONICSYNC_READY_FREQ_LOCKED;
}
if (dev_ptr->sensor_connected) {
uint8_t ready_value = 0;
chdrv_read_byte(dev_ptr, ready_reg, &ready_value);
if (ready_value & lock_mask) {
ret_val = 1;
}
}
return ret_val;
}

152
CHIRP/drivers/src/ch101_sonicsync_master_fw.c Normal file
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@@ -0,0 +1,152 @@
//Chirp Microsystems Firmware Header Generator
//File generated from sonicsync_master_v1.hex at 2020-02-10 10:43:30.645000 by cryang
#include <stdint.h>
#include "ch101_sonicsync.h"
const char * ch101_sonicsync_master_version = "sonicsync_master_v1.hex";
#define RAM_INIT_ADDRESS 1784
#define RAM_INIT_WRITE_SIZE 24
uint16_t get_ch101_sonicsync_master_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_sonicsync_master_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_sonicsync_master_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x64, 0x00, 0x01, 0x00, 0x4E, 0x0E, 0xD0, 0x07, 0x01, 0x01, 0x06, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, };
const unsigned char * get_ram_ch101_sonicsync_master_init_ptr(void) { return &ram_ch101_sonicsync_master_init[0];}
const unsigned char ch101_sonicsync_master_fw[CH101_FW_SIZE] = {
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0xc2, 0xff, 0x94, 0xfe, 0xca, 0xff, 0x00, 0x00, 0x26, 0xff, 0x20, 0xfc, 0xca, 0xff, 0x98, 0xff,
};

152
CHIRP/drivers/src/ch101_sonicsync_slave_fw.c Normal file
View File

@@ -0,0 +1,152 @@
//Chirp Microsystems Firmware Header Generator
//File generated from sonicsync_slave_v2.hex at 2020-03-19 10:42:28.735000 by cryang
#include <stdint.h>
#include "ch101_sonicsync.h"
const char * ch101_sonicsync_slave_version = "sonicsync_slave_v2.hex";
#define RAM_INIT_ADDRESS 1488
#define RAM_INIT_WRITE_SIZE 26
uint16_t get_ch101_sonicsync_slave_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch101_sonicsync_slave_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch101_sonicsync_slave_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x64, 0x00, 0x01, 0x00, 0xD0, 0x07, 0x01, 0x01, 0x4E, 0x0E, 0x06, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, };
const unsigned char * get_ram_ch101_sonicsync_slave_init_ptr(void) { return &ram_ch101_sonicsync_slave_init[0];}
const unsigned char ch101_sonicsync_slave_fw[CH101_FW_SIZE] = {
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};

244
CHIRP/drivers/src/ch201_finaltest.c Normal file
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@@ -0,0 +1,244 @@
/*!
* \file ch201_finaltest.c
*
* \brief Chirp CH201 Finaltest firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch201_finaltest.h"
#include "ch_common.h"
#include "ch_math_utils.h"
uint8_t ch201_finaltest_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH201_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH201_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH201_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch201_finaltest_fw;
dev_ptr->fw_version_string = ch201_finaltest_version;
dev_ptr->ram_init = get_ram_ch201_finaltest_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch201_finaltest_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch201_finaltest_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch201_finaltest_store_pt_result;
dev_ptr->store_op_freq = ch201_finaltest_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch201_finaltest_store_scale_factor;
dev_ptr->get_locked_state = ch201_finaltest_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = NULL;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = (ch_get_range_func_t) ch201_finaltest_get_range;
dev_ptr->api_funcs.get_amplitude = ch201_finaltest_get_amplitude;
dev_ptr->api_funcs.get_iq_data = (ch_get_iq_data_func_t) ch201_finaltest_get_iq_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = NULL; // not supported
dev_ptr->api_funcs.get_thresholds = NULL; // not supported
/* Init max sample count */
dev_ptr->max_samples = CH201_FINALTEST_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
uint8_t ch201_finaltest_set_rxqueue_item( ch_dev_t* dev_ptr, uint8_t queue_index,
uint8_t samples, uint8_t attenuation, uint8_t gain )
{
uint8_t ret = ! dev_ptr ||
queue_index >= CH201_FINALTEST_RXQUEUE_ITEMS ||
samples >= 1 << CH201_FINALTEST_RXQUEUE_BITS_SAMPLES ||
attenuation >= 1 << CH201_FINALTEST_RXQUEUE_BITS_ATTEN ||
gain >= 1 << CH201_FINALTEST_RXQUEUE_BITS_GAIN;
if( ! ret )
{
uint16_t item =
(uint16_t)samples << CH201_FINALTEST_RXQUEUE_BITPOS_SAMPLES |
(uint16_t)attenuation << CH201_FINALTEST_RXQUEUE_BITPOS_ATTEN |
(uint16_t)gain << CH201_FINALTEST_RXQUEUE_BITPOS_GAIN;
ret = chdrv_write_word( dev_ptr, CH201_FINALTEST_REG_RXQUEUE + queue_index * sizeof(item), item );
}
return ret;
}
uint8_t ch201_finaltest_set_threshold(ch_dev_t *dev_ptr, uint16_t threshold) {
uint8_t ret = 1;
if (dev_ptr->sensor_connected) {
ret = chdrv_write_word(dev_ptr, CH201_FINALTEST_REG_THRESHOLD, threshold);
}
return ret;
}
uint8_t ch201_finaltest_set_holdoff(ch_dev_t *dev_ptr, uint8_t holdoff) {
uint8_t ret = ! dev_ptr || ! dev_ptr->sensor_connected || ! holdoff;
if( ! ret ) ret = chdrv_write_byte(dev_ptr, CH201_FINALTEST_REG_HOLDOFF, holdoff);
return ret;
}
uint32_t ch201_finaltest_get_range(ch_dev_t *dev_ptr, ch201_finaltest_range_t range_type) {
uint8_t tof_reg;
uint32_t range = CH_NO_TARGET;
uint16_t time_of_flight;
uint16_t tof_scale_factor;
int err;
if (dev_ptr->sensor_connected) {
tof_reg = CH201_FINALTEST_REG_TOF;
err = chdrv_read_word(dev_ptr, tof_reg, &time_of_flight);
if (!err && (time_of_flight != UINT16_MAX)) { // If object detected
chdrv_read_word(dev_ptr, CH201_FINALTEST_REG_TOF_SF, &tof_scale_factor);
if (tof_scale_factor != 0) {
uint32_t num = (CH_SPEEDOFSOUND_MPS * dev_ptr->group->rtc_cal_pulse_ms * (uint32_t) time_of_flight);
uint32_t den = ((uint32_t) dev_ptr->rtc_cal_result * (uint32_t) tof_scale_factor) >> 12; // XXX need define
range = (num / den);
if (range_type == CH201_FINALTEST_RANGE_ECHO_ONE_WAY) {
range /= 2;
}
/* Adjust for oversampling, if used */
range >>= dev_ptr->oversample;
}
}
}
return range;
}
uint16_t ch201_finaltest_get_amplitude(ch_dev_t *dev_ptr) {
uint16_t intensity = 0xFFFF;
chdrv_read_word(dev_ptr, CH201_FINALTEST_REG_AMPLITUDE, &intensity);
return intensity;
}
uint8_t ch201_finaltest_get_iq_data(ch_dev_t *dev_ptr, uint8_t /*ch_iq_sample_t*/ *buf_ptr, uint16_t start_sample,
uint16_t num_samples, uint8_t /*ch_io_mode_t*/ mode) {
uint16_t iq_data_addr = CH201_FINALTEST_REG_DATA;
uint16_t num_bytes = (num_samples * sizeof(ch_iq_sample_t));
uint8_t error = 0;
iq_data_addr += (start_sample * sizeof(ch_iq_sample_t));
if (iq_data_addr > UINT8_MAX) {
error = 1;
}
if (mode != CH_IO_MODE_BLOCK) {
error = 1;
}
if (!error) {
error = chdrv_burst_read(dev_ptr, iq_data_addr, (uint8_t *) buf_ptr, num_bytes);
}
return error;
}
uint8_t ch201_finaltest_get_locked_state(ch_dev_t *dev_ptr) {
uint8_t locked = CH201_FINALTEST_READY_NOTLOCKED;
if (dev_ptr->sensor_connected) {
chdrv_read_byte(dev_ptr, CH201_FINALTEST_REG_READY, &locked);
}
return (locked == CH201_FINALTEST_READY_FREQ_LOCKED_BM);
}
void ch201_finaltest_store_pt_result(ch_dev_t *dev_ptr) {
chdrv_read_word(dev_ptr, CH201_FINALTEST_REG_CAL_RESULT, &(dev_ptr->rtc_cal_result));
}
void ch201_finaltest_store_op_freq(ch_dev_t *dev_ptr){
dev_ptr->op_frequency = ch201_finaltest_get_op_freq(dev_ptr);
}
void ch201_finaltest_store_scale_factor(ch_dev_t *dev_ptr){ // XXX NOTE: Stores amp scale factor, NOT ToF s.f.
ch_iq_sample_t QIData;
chdrv_burst_read(dev_ptr, CH201_FINALTEST_REG_DATA + (CH201_SCALEFACTOR_INDEX * 4),(uint8_t *) &QIData, 4);
dev_ptr->scale_factor = ch_iq_to_amplitude(&QIData);
}
int ch201_finaltest_set_pulse_width(ch_dev_t *dev_ptr,uint8_t pulse_width){
return chdrv_write_byte(dev_ptr, CH201_FINALTEST_REG_PULSE_WIDTH, pulse_width);
}
int ch201_finaltest_set_tx_length(ch_dev_t *dev_ptr, uint8_t tx_length){
return chdrv_write_byte(dev_ptr, CH201_FINALTEST_REG_TXLENGTH, tx_length);
}
uint32_t ch201_finaltest_get_op_freq(ch_dev_t *dev_ptr){
uint32_t num,den,opfreq;
uint16_t raw_freq; // aka scale factor
uint32_t freq_counter_cycles = dev_ptr->freqCounterCycles;
chdrv_read_word(dev_ptr, CH201_FINALTEST_REG_TOF_SF, &raw_freq);
num = (uint32_t)(((dev_ptr->rtc_cal_result)*1000U) / (16U * freq_counter_cycles))*(uint32_t)(raw_freq);
den = dev_ptr->group->rtc_cal_pulse_ms;
opfreq = (num/den);
return opfreq;
}

156
CHIRP/drivers/src/ch201_finaltest_fw.c Normal file
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//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 2.7.15)
// File generated from finaltest_v15_ch201.hex at 2020-11-23 17:55:59.829000 by klong
//
// Copyright (c) 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch201.h"
#include "ch201_finaltest.h"
const char * ch201_finaltest_version = "finaltest_v15_ch201";
const char * ch201_finaltest_gitsha1 = "db4a7f8556870e7f696c288fc6e360243191fd71";
#define RAM_INIT_ADDRESS 2378
#define RAM_INIT_WRITE_SIZE 10
uint16_t get_ch201_finaltest_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch201_finaltest_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch201_finaltest_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x00, 0x00, 0x10, 0x27, 0x00, 0x00, 0x01, 0x00, };
const unsigned char * get_ram_ch201_finaltest_init_ptr(void) { return &ram_ch201_finaltest_init[0];}
const unsigned char ch201_finaltest_fw[CH201_FW_SIZE] = {
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};

94
CHIRP/drivers/src/ch201_gprmt.c Normal file
View File

@@ -0,0 +1,94 @@
/*! \file ch201_gprmt.c
*
* \brief Chirp CH201 General Purpose Rangefinding Multi-Threshold firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch201_gprmt.h"
#include "ch_common.h"
uint8_t ch201_gprmt_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH201_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH201_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH201_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch201_gprmt_fw;
dev_ptr->fw_version_string = ch201_gprmt_version;
dev_ptr->ram_init = get_ram_ch201_gprmt_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch201_gprmt_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch201_gprmt_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = NULL; // not supported
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = ch_common_set_thresholds;
dev_ptr->api_funcs.get_thresholds = ch_common_get_thresholds;
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_rx_low_gain = ch_common_set_rx_low_gain;
dev_ptr->api_funcs.get_rx_low_gain = ch_common_get_rx_low_gain;
dev_ptr->api_funcs.set_tx_length = NULL; // not supported
dev_ptr->api_funcs.get_tx_length = ch_common_get_tx_length;
/* Init max sample count */
dev_ptr->max_samples = CH201_GPRMT_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

157
CHIRP/drivers/src/ch201_gprmt_fw.c Normal file
View File

@@ -0,0 +1,157 @@
//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 2.7.15)
// File generated from ch201_gprmt_v10a.hex at 2020-11-13 18:19:55.828000 by klong
//
// Copyright (c) 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch201.h"
#include "ch201_gprmt.h"
const char * ch201_gprmt_version = "gprmt_gprmt-201_v10a";
const char * ch201_gprmt_gitsha1 = "247eb617b50e896de61a12488571555935b91867";
#define RAM_INIT_ADDRESS 2392
#define RAM_INIT_WRITE_SIZE 28
uint16_t get_ch201_gprmt_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch201_gprmt_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch201_gprmt_init[RAM_INIT_WRITE_SIZE] = {
0x88, 0x13, 0xD0, 0x07, 0x20, 0x03, 0x90, 0x01, 0xFA, 0x00, 0xAF, 0x00, 0x06, 0x00, 0x00, 0x00,
0x00, 0xFA, 0x00, 0x00, 0x64, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, };
const unsigned char * get_ram_ch201_gprmt_init_ptr(void) { return &ram_ch201_gprmt_init[0];}
const unsigned char ch201_gprmt_fw[CH201_FW_SIZE] = {
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};

90
CHIRP/drivers/src/ch201_gprmt_wd.c Normal file
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@@ -0,0 +1,90 @@
/*! \file ch201_gprmt_wd.c
*
* \brief Chirp CH201 General Purpose Rangefinding Multi-Threshold firmware interface (watchdog enabled)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch201_gprmt_wd.h"
#include "ch_common.h"
uint8_t ch201_gprmt_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH201_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH201_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH201_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch201_gprmt_wd_fw;
dev_ptr->fw_version_string = ch201_gprmt_wd_version;
dev_ptr->ram_init = get_ram_ch201_gprmt_wd_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch201_gprmt_wd_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch201_gprmt_wd_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = NULL; // not supported
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = ch_common_set_thresholds;
dev_ptr->api_funcs.get_thresholds = ch_common_get_thresholds;
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
/* Init max sample count */
dev_ptr->max_samples = CH201_GPRMT_WD_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}

157
CHIRP/drivers/src/ch201_gprmt_wd_fw.c Normal file
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@@ -0,0 +1,157 @@
//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 2.7.15)
// File generated from ch201_gprmt_wd_v10a.hex at 2020-11-13 18:21:51.902000 by klong
//
// Copyright (c) 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch201.h"
#include "ch201_gprmt_wd.h"
const char * ch201_gprmt_wd_version = "gprmt_wd_gprmt-201_v10a";
const char * ch201_gprmt_wd_gitsha1 = "247eb617b50e896de61a12488571555935b91867";
#define RAM_INIT_ADDRESS 2392
#define RAM_INIT_WRITE_SIZE 28
uint16_t get_ch201_gprmt_wd_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch201_gprmt_wd_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch201_gprmt_wd_init[RAM_INIT_WRITE_SIZE] = {
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0x00, 0xFA, 0x00, 0x00, 0x64, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, };
const unsigned char * get_ram_ch201_gprmt_wd_init_ptr(void) { return &ram_ch201_gprmt_wd_init[0];}
const unsigned char ch201_gprmt_wd_fw[CH201_FW_SIZE] = {
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};

426
CHIRP/drivers/src/ch201_gprstr.c Normal file
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@@ -0,0 +1,426 @@
/*! \file ch201_gprstr.c
*
* \brief Chirp CH201 General Purpose Rangefinding / Static Target Rejection firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch201_gprstr.h"
#include "ch_common.h"
#include "chirp_bsp.h" // board support package function definitions
void ch201_gprstr_store_op_freq(ch_dev_t *dev_ptr);
void ch201_gprstr_store_scale_factor(ch_dev_t *dev_ptr);
uint32_t ch201_gprstr_get_range(ch_dev_t *dev_ptr, ch_range_t range_type);
uint16_t ch201_gprstr_get_amplitude(ch_dev_t *dev_ptr);
uint8_t ch201_gprstr_get_iq_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples, ch_io_mode_t mode);
uint8_t ch201_gprstr_set_target_interrupt(ch_dev_t *dev_ptr, uint8_t enable);
uint8_t ch201_gprstr_get_target_interrupt(ch_dev_t *dev_ptr);
uint8_t ch201_gprstr_set_num_samples(ch_dev_t *dev_ptr, uint16_t num_samples );
uint8_t ch201_gprstr_set_max_range(ch_dev_t *dev_ptr, uint16_t max_range_mm);
uint8_t ch201_gprstr_set_static_range(ch_dev_t *dev_ptr, uint16_t samples);
uint8_t ch201_gprstr_set_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index, uint16_t amplitude);
uint16_t ch201_gprstr_get_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index);
uint8_t ch201_gprstr_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH201_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH201_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH201_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch201_gprstr_fw;
dev_ptr->fw_version_string = ch201_gprstr_version;
dev_ptr->ram_init = get_ram_ch201_gprstr_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch201_gprstr_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch201_gprstr_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch201_gprstr_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch201_gprstr_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch201_gprstr_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch201_gprstr_set_max_range;
dev_ptr->api_funcs.set_static_range = ch201_gprstr_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch201_gprstr_get_range;
dev_ptr->api_funcs.get_amplitude = ch201_gprstr_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch201_gprstr_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = NULL; // Not supported
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_threshold = ch201_gprstr_set_threshold;
dev_ptr->api_funcs.get_threshold = ch201_gprstr_get_threshold;
dev_ptr->api_funcs.set_thresholds = NULL;
dev_ptr->api_funcs.get_thresholds = NULL;
dev_ptr->api_funcs.set_target_interrupt = ch201_gprstr_set_target_interrupt;
dev_ptr->api_funcs.get_target_interrupt = ch201_gprstr_get_target_interrupt;
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
dev_ptr->api_funcs.set_rx_low_gain = ch_common_set_rx_low_gain;
dev_ptr->api_funcs.get_rx_low_gain = ch_common_get_rx_low_gain;
dev_ptr->api_funcs.set_tx_length = ch_common_set_tx_length;
dev_ptr->api_funcs.get_tx_length = ch_common_get_tx_length;
/* Init max sample count */
dev_ptr->max_samples = CH201_GPRSTR_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
void ch201_gprstr_store_op_freq(ch_dev_t *dev_ptr){
uint8_t tof_sf_reg;
uint16_t raw_freq; // aka scale factor
uint32_t freq_counter_cycles;
uint32_t num;
uint32_t den;
uint32_t op_freq;
tof_sf_reg = CH201_GPRSTR_REG_TOF_SF;
freq_counter_cycles = CH201_COMMON_FREQCOUNTERCYCLES;
chdrv_read_word(dev_ptr, tof_sf_reg, &raw_freq);
num = (uint32_t)(((dev_ptr->rtc_cal_result)*1000U) / (16U * freq_counter_cycles)) * (uint32_t)(raw_freq);
den = (uint32_t)(dev_ptr->group->rtc_cal_pulse_ms);
op_freq = (num/den);
dev_ptr->op_frequency = op_freq;
}
void ch201_gprstr_store_scale_factor(ch_dev_t *dev_ptr) {
uint8_t err;
uint8_t tof_sf_reg;
uint16_t scale_factor;
tof_sf_reg = CH201_GPRSTR_REG_TOF_SF;
err = chdrv_read_word(dev_ptr, tof_sf_reg, &scale_factor);
if (!err) {
dev_ptr->scale_factor = scale_factor;
} else {
dev_ptr->scale_factor = 0;
}
}
uint32_t ch201_gprstr_get_range(ch_dev_t *dev_ptr, ch_range_t range_type) {
uint8_t tof_reg;
uint32_t range = CH_NO_TARGET;
uint16_t time_of_flight;
uint16_t scale_factor;
int err;
if (dev_ptr->sensor_connected) {
tof_reg = CH201_GPRSTR_REG_TOF;
err = chdrv_read_word(dev_ptr, tof_reg, &time_of_flight);
if (!err && (time_of_flight != UINT16_MAX)) { // If object detected
if (dev_ptr->scale_factor == 0) {
ch201_gprstr_store_scale_factor(dev_ptr);
}
scale_factor = dev_ptr->scale_factor;
if (scale_factor != 0) {
uint32_t num = (CH_SPEEDOFSOUND_MPS * dev_ptr->group->rtc_cal_pulse_ms * (uint32_t) time_of_flight);
uint32_t den = ((uint32_t) dev_ptr->rtc_cal_result * (uint32_t) scale_factor) >> 11; // XXX need define
range = (num / den);
if (dev_ptr->part_number == CH201_PART_NUMBER) {
range *= 2;
}
if (range_type == CH_RANGE_ECHO_ONE_WAY) {
range /= 2;
}
/* Adjust for oversampling, if used */
range >>= dev_ptr->oversample;
}
}
}
return range;
}
uint16_t ch201_gprstr_get_amplitude(ch_dev_t *dev_ptr) {
uint8_t amplitude_reg;
uint16_t amplitude = 0;
if (dev_ptr->sensor_connected) {
amplitude_reg = CH201_GPRSTR_REG_AMPLITUDE;
chdrv_read_word(dev_ptr, amplitude_reg, &amplitude);
}
return amplitude;
}
uint8_t ch201_gprstr_get_iq_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples,
ch_io_mode_t mode) {
uint16_t iq_data_addr;
ch_group_t *grp_ptr = dev_ptr->group;
int error = 1;
uint8_t use_prog_read = 0; // default = do not use low-level programming interface
#ifndef USE_STD_I2C_FOR_IQ
if (grp_ptr->num_connected[dev_ptr->i2c_bus_index] == 1) { // if only one device on this bus
use_prog_read = 1; // use low-level interface
}
#endif
iq_data_addr = CH201_GPRSTR_REG_DATA;
iq_data_addr += (start_sample * sizeof(ch_iq_sample_t));
if ((num_samples != 0) && ((start_sample + num_samples) <= dev_ptr->max_samples)) {
uint16_t num_bytes = (num_samples * sizeof(ch_iq_sample_t));
if (mode == CH_IO_MODE_BLOCK) {
/* blocking transfer */
if (use_prog_read) {
/* use low-level programming interface for speed */
int num_transfers = (num_bytes + (CH_PROG_XFER_SIZE - 1)) / CH_PROG_XFER_SIZE;
int bytes_left = num_bytes; // remaining bytes to read
/* Convert register offsets to full memory addresses */
if (dev_ptr->part_number == CH101_PART_NUMBER) {
iq_data_addr += CH101_DATA_MEM_ADDR + CH101_COMMON_I2CREGS_OFFSET;
} else {
iq_data_addr += CH201_DATA_MEM_ADDR + CH201_COMMON_I2CREGS_OFFSET;
}
chbsp_program_enable(dev_ptr); // assert PROG pin
for (int xfer = 0; xfer < num_transfers; xfer++) {
int bytes_to_read;
uint8_t message[] = { (0x80 | CH_PROG_REG_CTL), 0x09 }; // read burst command
if (bytes_left > CH_PROG_XFER_SIZE) {
bytes_to_read = CH_PROG_XFER_SIZE;
} else {
bytes_to_read = bytes_left;
}
chdrv_prog_write(dev_ptr, CH_PROG_REG_ADDR, (iq_data_addr + (xfer * CH_PROG_XFER_SIZE)));
chdrv_prog_write(dev_ptr, CH_PROG_REG_CNT, (bytes_to_read - 1));
error = chdrv_prog_i2c_write(dev_ptr, message, sizeof(message));
error |= chdrv_prog_i2c_read(dev_ptr, ((uint8_t *)buf_ptr + (xfer * CH_PROG_XFER_SIZE)), bytes_to_read);
bytes_left -= bytes_to_read;
}
chbsp_program_disable(dev_ptr); // de-assert PROG pin
} else { /* if (use_prog_read) */
/* use standard I2C interface */
error = chdrv_burst_read(dev_ptr, iq_data_addr, (uint8_t *) buf_ptr, num_bytes);
}
} else {
/* non-blocking transfer - queue a read transaction (must be started using ch_io_start_nb() ) */
if (use_prog_read && (grp_ptr->i2c_drv_flags & I2C_DRV_FLAG_USE_PROG_NB)) {
/* Use low-level programming interface to read data */
/* Convert register offsets to full memory addresses */
if (dev_ptr->part_number == CH101_PART_NUMBER) {
iq_data_addr += (CH101_DATA_MEM_ADDR + CH101_COMMON_I2CREGS_OFFSET);
} else {
iq_data_addr += (CH201_DATA_MEM_ADDR + CH201_COMMON_I2CREGS_OFFSET);
}
error = chdrv_group_i2c_queue(grp_ptr, dev_ptr, 1, CHDRV_NB_TRANS_TYPE_PROG, iq_data_addr, num_bytes,
(uint8_t *) buf_ptr);
} else {
/* Use regular I2C register interface to read data */
error = chdrv_group_i2c_queue(grp_ptr, dev_ptr, 1, CHDRV_NB_TRANS_TYPE_STD, iq_data_addr, num_bytes,
(uint8_t*) buf_ptr);
}
}
}
return error;
}
uint8_t ch201_gprstr_set_target_interrupt(ch_dev_t *dev_ptr, uint8_t enable) {
uint8_t reg = CH201_GPRSTR_REG_INTCFG;
uint8_t ret_val = RET_OK;
if (dev_ptr->sensor_connected) {
ret_val = chdrv_write_byte(dev_ptr, reg, enable);
}
return ret_val;
}
uint8_t ch201_gprstr_get_target_interrupt(ch_dev_t *dev_ptr) {
uint8_t reg = CH201_GPRSTR_REG_INTCFG;
uint8_t enabled = 0;
if (dev_ptr->sensor_connected) {
chdrv_read_byte(dev_ptr, reg, &enabled);
}
return enabled;
}
uint8_t ch201_gprstr_set_num_samples(ch_dev_t *dev_ptr, uint16_t num_samples ) {
uint8_t max_range_reg;
uint8_t ret_val = 1; // default is error (not connected or num_samples too big)
uint8_t low_gain_rxlen;
max_range_reg = CH201_COMMON_REG_MAX_RANGE;
num_samples /= 2; // each internal count for CH201 represents 2 physical samples
ret_val = chdrv_read_byte( dev_ptr, CH201_GPRSTR_REG_LOW_GAIN_RXLEN, &low_gain_rxlen);
if (ret_val) return ret_val;
// check if low gain Rx length is less than Rx length
if (num_samples <= low_gain_rxlen ) {
low_gain_rxlen = num_samples - 1;
chdrv_write_byte(dev_ptr, CH201_GPRSTR_REG_LOW_GAIN_RXLEN, low_gain_rxlen);
}
if (dev_ptr->sensor_connected && (num_samples <= UINT8_MAX)) {
ret_val = chdrv_write_byte(dev_ptr, max_range_reg, num_samples);
}
if (!ret_val) {
dev_ptr->num_rx_samples = (num_samples * 2); // store actual physical sample count
}
else {
dev_ptr->num_rx_samples = 0;
}
return ret_val;
}
uint8_t ch201_gprstr_set_max_range(ch_dev_t *dev_ptr, uint16_t max_range_mm) {
uint8_t ret_val;
uint32_t num_samples;
ret_val = (!dev_ptr->sensor_connected);
if (!ret_val) {
num_samples = ch_common_mm_to_samples(dev_ptr, max_range_mm);
if (num_samples > dev_ptr->max_samples) {
num_samples = dev_ptr->max_samples;
dev_ptr->max_range = ch_samples_to_mm(dev_ptr, num_samples); // store reduced max range
} else {
dev_ptr->max_range = max_range_mm; // store user-specified max range
}
#ifdef CHDRV_DEBUG
char cbuf[80];
snprintf(cbuf, sizeof(cbuf), "num_samples=%lu\n", num_samples);
chbsp_print_str(cbuf);
#endif
}
if (!ret_val) {
ret_val = ch201_gprstr_set_num_samples(dev_ptr, num_samples);
}
#ifdef CHDRV_DEBUG
printf("Set samples: ret_val: %u dev_ptr->num_rx_samples: %u\n", ret_val, dev_ptr->num_rx_samples);
#endif
return ret_val;
}
uint8_t ch201_gprstr_set_static_range(ch_dev_t *dev_ptr, uint16_t samples) {
uint8_t ret_val = 1; // default is error return
/* Enforce minimum STR sample range to act as ringdown filter */
if (samples < CH201_GPRSTR_MIN_STR_SAMPLES) {
samples = CH201_GPRSTR_MIN_STR_SAMPLES;
}
if (dev_ptr->sensor_connected) {
/* Write value to register - 1/2 of actual sample count, so will fit in 1 byte */
ret_val = chdrv_write_byte(dev_ptr, CH201_GPRSTR_REG_STAT_RANGE, (samples / 2));
if (!ret_val) {
ret_val = chdrv_write_byte(dev_ptr, CH201_GPRSTR_REG_STAT_COEFF,
CH201_GPRSTR_STAT_COEFF_DEFAULT);
}
if (!ret_val) {
dev_ptr->static_range = samples;
}
}
return ret_val;
}
uint8_t ch201_gprstr_set_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index, uint16_t amplitude) {
uint8_t ret_val = RET_OK;
uint8_t regs[] = {CH201_GPRSTR_REG_THRESH_0, CH201_GPRSTR_REG_THRESH_1};
if (threshold_index >= CH201_GPRSTR_NUM_THRESHOLDS)
return RET_ERR;
if (dev_ptr->sensor_connected) {
ret_val = chdrv_write_word(dev_ptr, regs[threshold_index], amplitude);
}
return ret_val;
}
uint16_t ch201_gprstr_get_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index) {
uint16_t amplitude = 0;
uint8_t regs[] = {CH201_GPRSTR_REG_THRESH_0, CH201_GPRSTR_REG_THRESH_1};
if ((threshold_index < CH201_GPRSTR_NUM_THRESHOLDS) && dev_ptr->sensor_connected) {
chdrv_read_word(dev_ptr, regs[threshold_index], &amplitude);
}
return amplitude;
}

157
CHIRP/drivers/src/ch201_gprstr_fw.c Normal file
View File

@@ -0,0 +1,157 @@
//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 2.7.15)
// File generated from ch201_gprstr_v16a.hex at 2020-11-16 11:11:03.305000 by klong
//
// Copyright (c) 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch201.h"
#include "ch201_gprstr.h"
const char * ch201_gprstr_version = "gprstr_gprstr-201_v16a";
const char * ch201_gprstr_gitsha1 = "247eb617b50e896de61a12488571555935b91867";
#define RAM_INIT_ADDRESS 2300
#define RAM_INIT_WRITE_SIZE 17
uint16_t get_ch201_gprstr_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch201_gprstr_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch201_gprstr_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00,
0x01, };
const unsigned char * get_ram_ch201_gprstr_init_ptr(void) { return &ram_ch201_gprstr_init[0];}
const unsigned char ch201_gprstr_fw[CH201_FW_SIZE] = {
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};

421
CHIRP/drivers/src/ch201_gprstr_wd.c Normal file
View File

@@ -0,0 +1,421 @@
/*! \file ch201_gprstr_wd.c
*
* \brief Chirp CH201 General Purpose Rangefinding / Static Target Rejection firmware interface (watchdog enabled)
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright <20> 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch201_gprstr_wd.h"
#include "ch_common.h"
#include "chirp_bsp.h" // board support package function definitions
void ch201_gprstr_wd_store_op_freq(ch_dev_t *dev_ptr);
void ch201_gprstr_wd_store_scale_factor(ch_dev_t *dev_ptr);
uint32_t ch201_gprstr_wd_get_range(ch_dev_t *dev_ptr, ch_range_t range_type);
uint16_t ch201_gprstr_wd_get_amplitude(ch_dev_t *dev_ptr);
uint8_t ch201_gprstr_wd_get_iq_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples, ch_io_mode_t mode);
uint8_t ch201_gprstr_wd_set_target_interrupt(ch_dev_t *dev_ptr, uint8_t enable);
uint8_t ch201_gprstr_wd_get_target_interrupt(ch_dev_t *dev_ptr);
uint8_t ch201_gprstr_wd_set_num_samples(ch_dev_t *dev_ptr, uint16_t num_samples );
uint8_t ch201_gprstr_wd_set_max_range(ch_dev_t *dev_ptr, uint16_t max_range_mm);
uint8_t ch201_gprstr_wd_set_static_range(ch_dev_t *dev_ptr, uint16_t samples);
uint8_t ch201_gprstr_wd_set_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index, uint16_t amplitude);
uint16_t ch201_gprstr_wd_get_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index);
uint8_t ch201_gprstr_wd_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH201_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH201_COMMON_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH201_COMMON_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch201_gprstr_wd_fw;
dev_ptr->fw_version_string = ch201_gprstr_wd_version;
dev_ptr->ram_init = get_ram_ch201_gprstr_wd_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch201_gprstr_wd_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch201_gprstr_wd_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch201_gprstr_wd_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch201_gprstr_wd_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch201_gprstr_wd_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch201_gprstr_wd_set_max_range;
dev_ptr->api_funcs.set_static_range = ch201_gprstr_wd_set_static_range;
dev_ptr->api_funcs.set_rx_holdoff = ch_common_set_rx_holdoff;
dev_ptr->api_funcs.get_rx_holdoff = ch_common_get_rx_holdoff;
dev_ptr->api_funcs.get_range = ch201_gprstr_wd_get_range;
dev_ptr->api_funcs.get_amplitude = ch201_gprstr_wd_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch201_gprstr_wd_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = NULL; // Not supported
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_common_mm_to_samples;
dev_ptr->api_funcs.set_threshold = ch201_gprstr_wd_set_threshold;
dev_ptr->api_funcs.get_threshold = ch201_gprstr_wd_get_threshold;
dev_ptr->api_funcs.set_thresholds = NULL;
dev_ptr->api_funcs.get_thresholds = NULL;
dev_ptr->api_funcs.set_target_interrupt = ch201_gprstr_wd_set_target_interrupt;
dev_ptr->api_funcs.get_target_interrupt = ch201_gprstr_wd_get_target_interrupt;
dev_ptr->api_funcs.set_sample_window = ch_common_set_sample_window;
dev_ptr->api_funcs.get_amplitude_avg = ch_common_get_amplitude_avg;
/* Init max sample count */
dev_ptr->max_samples = CH201_GPRSTR_WD_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
void ch201_gprstr_wd_store_op_freq(ch_dev_t *dev_ptr){
uint8_t tof_sf_reg;
uint16_t raw_freq; // aka scale factor
uint32_t freq_counter_cycles;
uint32_t num;
uint32_t den;
uint32_t op_freq;
tof_sf_reg = CH201_GPRSTR_WD_REG_TOF_SF;
freq_counter_cycles = CH201_COMMON_FREQCOUNTERCYCLES;
chdrv_read_word(dev_ptr, tof_sf_reg, &raw_freq);
num = (uint32_t)(((dev_ptr->rtc_cal_result)*1000U) / (16U * freq_counter_cycles)) * (uint32_t)(raw_freq);
den = (uint32_t)(dev_ptr->group->rtc_cal_pulse_ms);
op_freq = (num/den);
dev_ptr->op_frequency = op_freq;
}
void ch201_gprstr_wd_store_scale_factor(ch_dev_t *dev_ptr) {
uint8_t err;
uint8_t tof_sf_reg;
uint16_t scale_factor;
tof_sf_reg = CH201_GPRSTR_WD_REG_TOF_SF;
err = chdrv_read_word(dev_ptr, tof_sf_reg, &scale_factor);
if (!err) {
dev_ptr->scale_factor = scale_factor;
} else {
dev_ptr->scale_factor = 0;
}
}
uint32_t ch201_gprstr_wd_get_range(ch_dev_t *dev_ptr, ch_range_t range_type) {
uint8_t tof_reg;
uint32_t range = CH_NO_TARGET;
uint16_t time_of_flight;
uint16_t scale_factor;
int err;
if (dev_ptr->sensor_connected) {
tof_reg = CH201_GPRSTR_WD_REG_TOF;
err = chdrv_read_word(dev_ptr, tof_reg, &time_of_flight);
if (!err && (time_of_flight != UINT16_MAX)) { // If object detected
if (dev_ptr->scale_factor == 0) {
ch201_gprstr_wd_store_scale_factor(dev_ptr);
}
scale_factor = dev_ptr->scale_factor;
if (scale_factor != 0) {
uint32_t num = (CH_SPEEDOFSOUND_MPS * dev_ptr->group->rtc_cal_pulse_ms * (uint32_t) time_of_flight);
uint32_t den = ((uint32_t) dev_ptr->rtc_cal_result * (uint32_t) scale_factor) >> 11; // XXX need define
range = (num / den);
if (dev_ptr->part_number == CH201_PART_NUMBER) {
range *= 2;
}
if (range_type == CH_RANGE_ECHO_ONE_WAY) {
range /= 2;
}
/* Adjust for oversampling, if used */
range >>= dev_ptr->oversample;
}
}
}
return range;
}
uint16_t ch201_gprstr_wd_get_amplitude(ch_dev_t *dev_ptr) {
uint8_t amplitude_reg;
uint16_t amplitude = 0;
if (dev_ptr->sensor_connected) {
amplitude_reg = CH201_GPRSTR_WD_REG_AMPLITUDE;
chdrv_read_word(dev_ptr, amplitude_reg, &amplitude);
}
return amplitude;
}
uint8_t ch201_gprstr_wd_get_iq_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples,
ch_io_mode_t mode) {
uint16_t iq_data_addr;
ch_group_t *grp_ptr = dev_ptr->group;
int error = 1;
uint8_t use_prog_read = 0; // default = do not use low-level programming interface
#ifndef USE_STD_I2C_FOR_IQ
if (grp_ptr->num_connected[dev_ptr->i2c_bus_index] == 1) { // if only one device on this bus
use_prog_read = 1; // use low-level interface
}
#endif
iq_data_addr = CH201_GPRSTR_WD_REG_DATA;
iq_data_addr += (start_sample * sizeof(ch_iq_sample_t));
if ((num_samples != 0) && ((start_sample + num_samples) <= dev_ptr->max_samples)) {
uint16_t num_bytes = (num_samples * sizeof(ch_iq_sample_t));
if (mode == CH_IO_MODE_BLOCK) {
/* blocking transfer */
if (use_prog_read) {
/* use low-level programming interface for speed */
int num_transfers = (num_bytes + (CH_PROG_XFER_SIZE - 1)) / CH_PROG_XFER_SIZE;
int bytes_left = num_bytes; // remaining bytes to read
/* Convert register offsets to full memory addresses */
if (dev_ptr->part_number == CH101_PART_NUMBER) {
iq_data_addr += CH101_DATA_MEM_ADDR + CH101_COMMON_I2CREGS_OFFSET;
} else {
iq_data_addr += CH201_DATA_MEM_ADDR + CH201_COMMON_I2CREGS_OFFSET;
}
chbsp_program_enable(dev_ptr); // assert PROG pin
for (int xfer = 0; xfer < num_transfers; xfer++) {
int bytes_to_read;
uint8_t message[] = { (0x80 | CH_PROG_REG_CTL), 0x09 }; // read burst command
if (bytes_left > CH_PROG_XFER_SIZE) {
bytes_to_read = CH_PROG_XFER_SIZE;
} else {
bytes_to_read = bytes_left;
}
chdrv_prog_write(dev_ptr, CH_PROG_REG_ADDR, (iq_data_addr + (xfer * CH_PROG_XFER_SIZE)));
chdrv_prog_write(dev_ptr, CH_PROG_REG_CNT, (bytes_to_read - 1));
error = chdrv_prog_i2c_write(dev_ptr, message, sizeof(message));
error |= chdrv_prog_i2c_read(dev_ptr, ((uint8_t *)buf_ptr + (xfer * CH_PROG_XFER_SIZE)), bytes_to_read);
bytes_left -= bytes_to_read;
}
chbsp_program_disable(dev_ptr); // de-assert PROG pin
} else { /* if (use_prog_read) */
/* use standard I2C interface */
error = chdrv_burst_read(dev_ptr, iq_data_addr, (uint8_t *) buf_ptr, num_bytes);
}
} else {
/* non-blocking transfer - queue a read transaction (must be started using ch_io_start_nb() ) */
if (use_prog_read && (grp_ptr->i2c_drv_flags & I2C_DRV_FLAG_USE_PROG_NB)) {
/* Use low-level programming interface to read data */
/* Convert register offsets to full memory addresses */
if (dev_ptr->part_number == CH101_PART_NUMBER) {
iq_data_addr += (CH101_DATA_MEM_ADDR + CH101_COMMON_I2CREGS_OFFSET);
} else {
iq_data_addr += (CH201_DATA_MEM_ADDR + CH201_COMMON_I2CREGS_OFFSET);
}
error = chdrv_group_i2c_queue(grp_ptr, dev_ptr, 1, CHDRV_NB_TRANS_TYPE_PROG, iq_data_addr, num_bytes,
(uint8_t *) buf_ptr);
} else {
/* Use regular I2C register interface to read data */
error = chdrv_group_i2c_queue(grp_ptr, dev_ptr, 1, CHDRV_NB_TRANS_TYPE_STD, iq_data_addr, num_bytes,
(uint8_t*) buf_ptr);
}
}
}
return error;
}
uint8_t ch201_gprstr_wd_set_target_interrupt(ch_dev_t *dev_ptr, uint8_t enable) {
uint8_t reg = CH201_GPRSTR_WD_REG_INTCFG;
uint8_t ret_val = RET_OK;
if (dev_ptr->sensor_connected) {
ret_val = chdrv_write_byte(dev_ptr, reg, enable);
}
return ret_val;
}
uint8_t ch201_gprstr_wd_get_target_interrupt(ch_dev_t *dev_ptr) {
uint8_t reg = CH201_GPRSTR_WD_REG_INTCFG;
uint8_t enabled = 0;
if (dev_ptr->sensor_connected) {
chdrv_read_byte(dev_ptr, reg, &enabled);
}
return enabled;
}
uint8_t ch201_gprstr_wd_set_num_samples(ch_dev_t *dev_ptr, uint16_t num_samples ) {
uint8_t max_range_reg;
uint8_t ret_val = 1; // default is error (not connected or num_samples too big)
uint8_t low_gain_rxlen;
max_range_reg = CH201_COMMON_REG_MAX_RANGE;
num_samples /= 2; // each internal count for CH201 represents 2 physical samples
ret_val = chdrv_read_byte( dev_ptr, CH201_GPRSTR_WD_REG_LOW_GAIN_RXLEN, &low_gain_rxlen);
if (ret_val) return ret_val;
// check if low gain Rx length is less than Rx length
if (num_samples <= low_gain_rxlen ) {
low_gain_rxlen = num_samples - 1;
chdrv_write_byte(dev_ptr, CH201_GPRSTR_WD_REG_LOW_GAIN_RXLEN, low_gain_rxlen);
}
if (dev_ptr->sensor_connected && (num_samples <= UINT8_MAX)) {
ret_val = chdrv_write_byte(dev_ptr, max_range_reg, num_samples);
}
if (!ret_val) {
dev_ptr->num_rx_samples = (num_samples * 2); // store actual physical sample count
}
else {
dev_ptr->num_rx_samples = 0;
}
return ret_val;
}
uint8_t ch201_gprstr_wd_set_max_range(ch_dev_t *dev_ptr, uint16_t max_range_mm) {
uint8_t ret_val;
uint32_t num_samples;
ret_val = (!dev_ptr->sensor_connected);
if (!ret_val) {
num_samples = ch_common_mm_to_samples(dev_ptr, max_range_mm);
if (num_samples > dev_ptr->max_samples) {
num_samples = dev_ptr->max_samples;
dev_ptr->max_range = ch_samples_to_mm(dev_ptr, num_samples); // store reduced max range
} else {
dev_ptr->max_range = max_range_mm; // store user-specified max range
}
#ifdef CHDRV_DEBUG
char cbuf[80];
snprintf(cbuf, sizeof(cbuf), "num_samples=%lu\n", num_samples);
chbsp_print_str(cbuf);
#endif
}
if (!ret_val) {
ret_val = ch201_gprstr_wd_set_num_samples(dev_ptr, num_samples);
}
#ifdef CHDRV_DEBUG
printf("Set samples: ret_val: %u dev_ptr->num_rx_samples: %u\n", ret_val, dev_ptr->num_rx_samples);
#endif
return ret_val;
}
uint8_t ch201_gprstr_wd_set_static_range(ch_dev_t *dev_ptr, uint16_t samples) {
uint8_t ret_val = 1; // default is error return
/* Enforce minimum STR sample range to act as ringdown filter */
if (samples < CH201_GPRSTR_WD_MIN_STR_SAMPLES) {
samples = CH201_GPRSTR_WD_MIN_STR_SAMPLES;
}
if (dev_ptr->sensor_connected) {
/* Write value to register - 1/2 of actual sample count, so will fit in 1 byte */
ret_val = chdrv_write_byte(dev_ptr, CH201_GPRSTR_WD_REG_STAT_RANGE, (samples / 2));
if (!ret_val) {
ret_val = chdrv_write_byte(dev_ptr, CH201_GPRSTR_WD_REG_STAT_COEFF,
CH201_GPRSTR_WD_STAT_COEFF_DEFAULT);
}
if (!ret_val) {
dev_ptr->static_range = samples;
}
}
return ret_val;
}
uint8_t ch201_gprstr_wd_set_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index, uint16_t amplitude) {
uint8_t ret_val = RET_OK;
uint8_t regs[] = {CH201_GPRSTR_WD_REG_THRESH_0, CH201_GPRSTR_WD_REG_THRESH_1};
if (threshold_index >= CH201_GPRSTR_WD_NUM_THRESHOLDS)
return RET_ERR;
if (dev_ptr->sensor_connected) {
ret_val = chdrv_write_word(dev_ptr, regs[threshold_index], amplitude);
}
return ret_val;
}
uint16_t ch201_gprstr_wd_get_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index) {
uint16_t amplitude = 0;
uint8_t regs[] = {CH201_GPRSTR_WD_REG_THRESH_0, CH201_GPRSTR_WD_REG_THRESH_1};
if ((threshold_index < CH201_GPRSTR_WD_NUM_THRESHOLDS) && dev_ptr->sensor_connected) {
chdrv_read_word(dev_ptr, regs[threshold_index], &amplitude);
}
return amplitude;
}

157
CHIRP/drivers/src/ch201_gprstr_wd_fw.c Normal file
View File

@@ -0,0 +1,157 @@
//
// Chirp Microsystems Firmware Header Generator v2.0 (Python 2.7.15)
// File generated from ch201_gprstr_wd_v16a.hex at 2020-11-18 14:02:30.661000 by klong
//
// Copyright (c) 2020, Chirp Microsystems. All rights reserved.
//
#include <stdint.h>
#include "ch201.h"
#include "ch201_gprstr_wd.h"
const char * ch201_gprstr_wd_version = "gprstr_wd_gprstr-201_v16a";
const char * ch201_gprstr_wd_gitsha1 = "247eb617b50e896de61a12488571555935b91867";
#define RAM_INIT_ADDRESS 2300
#define RAM_INIT_WRITE_SIZE 17
uint16_t get_ch201_gprstr_wd_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch201_gprstr_wd_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch201_gprstr_wd_init[RAM_INIT_WRITE_SIZE] = {
0x06, 0x00, 0x00, 0x00, 0x00, 0xFA, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00,
0x01, };
const unsigned char * get_ram_ch201_gprstr_wd_init_ptr(void) { return &ram_ch201_gprstr_wd_init[0];}
const unsigned char ch201_gprstr_wd_fw[CH201_FW_SIZE] = {
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};

140
CHIRP/drivers/src/ch201_presence.c Normal file
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@@ -0,0 +1,140 @@
/*! \file ch201_presence.c
*
* \brief Chirp CH201 presence detection firmware interface
*
* This file contains function definitions to interface a specific sensor firmware
* package to SonicLib, including the main initialization routine for the firmware.
* That routine initializes various fields within the \a ch_dev_t device descriptor
* and specifies the proper functions to implement SonicLib API calls. Those may
* either be common implementations or firmware-specific routines located in this file.
*/
/*
Copyright © 2019-2020, Chirp Microsystems. All rights reserved.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch201_presence.h"
#include "ch_common.h"
static uint16_t ch_presence_mm_to_samples(ch_dev_t *dev_ptr, uint16_t num_mm);
uint8_t ch201_presence_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index) {
dev_ptr->part_number = CH201_PART_NUMBER;
dev_ptr->app_i2c_address = i2c_addr;
dev_ptr->io_index = io_index;
dev_ptr->i2c_bus_index = i2c_bus_index;
dev_ptr->freqCounterCycles = CH201_PRESENCE_FREQCOUNTERCYCLES;
dev_ptr->freqLockValue = CH201_PRESENCE_READY_FREQ_LOCKED;
/* Init firmware-specific function pointers */
dev_ptr->firmware = ch201_presence_fw;
dev_ptr->fw_version_string = ch201_presence_version;
dev_ptr->ram_init = get_ram_ch201_presence_init_ptr();
dev_ptr->get_fw_ram_init_size = get_ch201_presence_fw_ram_init_size;
dev_ptr->get_fw_ram_init_addr = get_ch201_presence_fw_ram_init_addr;
dev_ptr->prepare_pulse_timer = ch_common_prepare_pulse_timer;
dev_ptr->store_pt_result = ch_common_store_pt_result;
dev_ptr->store_op_freq = ch_common_store_op_freq;
dev_ptr->store_bandwidth = ch_common_store_bandwidth;
dev_ptr->store_scalefactor = ch_common_store_scale_factor;
dev_ptr->get_locked_state = ch_common_get_locked_state;
/* Init API function pointers */
dev_ptr->api_funcs.fw_load = ch_common_fw_load;
dev_ptr->api_funcs.set_mode = ch_common_set_mode;
dev_ptr->api_funcs.set_sample_interval = ch_common_set_sample_interval;
dev_ptr->api_funcs.set_num_samples = ch_common_set_num_samples;
dev_ptr->api_funcs.set_max_range = ch_common_set_max_range;
dev_ptr->api_funcs.set_static_range = NULL; // not supported
dev_ptr->api_funcs.get_range = ch_common_get_range;
dev_ptr->api_funcs.get_amplitude = ch_common_get_amplitude;
dev_ptr->api_funcs.get_iq_data = ch_common_get_iq_data;
dev_ptr->api_funcs.get_amplitude_data = ch_common_get_amplitude_data;
dev_ptr->api_funcs.samples_to_mm = ch_common_samples_to_mm;
dev_ptr->api_funcs.mm_to_samples = ch_presence_mm_to_samples;
dev_ptr->api_funcs.set_thresholds = ch_common_set_thresholds;
dev_ptr->api_funcs.get_thresholds = ch_common_get_thresholds;
dev_ptr->api_funcs.set_rx_low_gain = ch_common_set_rx_low_gain;
dev_ptr->api_funcs.get_rx_low_gain = ch_common_get_rx_low_gain;
dev_ptr->api_funcs.set_tx_length = ch_common_set_tx_length;
dev_ptr->api_funcs.get_tx_length = ch_common_get_tx_length;
/* Init max sample count */
dev_ptr->max_samples = CH201_PRESENCE_MAX_SAMPLES;
/* This firmware does not use oversampling */
dev_ptr->oversample = 0;
/* Init device and group descriptor linkage */
dev_ptr->group = grp_ptr; // set parent group pointer
grp_ptr->device[io_index] = dev_ptr; // add to parent group
return 0;
}
uint8_t ch201_presence_set_decimation(ch_dev_t *dev_ptr, uint8_t decimation)
{
uint8_t ret = 1;
uint8_t RegValue;
if (dev_ptr->sensor_connected) {
ret = chdrv_read_byte(dev_ptr, CH201_PRESENCE_DECIMATION, &RegValue);
RegValue &= ~CH201_PRESENCE_DECIMATION_MASK;
RegValue |= decimation;
// Configure Decimation
if (ret == 0)
ret |= chdrv_write_byte(dev_ptr, CH201_PRESENCE_DECIMATION, RegValue);
}
return ret;
}
uint8_t ch201_presence_enable_cordic(ch_dev_t *dev_ptr, uint8_t enable)
{
uint8_t ret = 1;
uint8_t RegValue;
if (dev_ptr->sensor_connected) {
ret = chdrv_read_byte(dev_ptr, CH201_PRESENCE_DECIMATION, &RegValue);
RegValue &= ~CH201_PRESENCE_CORDIC_MASK;
RegValue |= enable;
// Configure Decimation
if (ret == 0)
ret |= chdrv_write_byte(dev_ptr, CH201_PRESENCE_DECIMATION, RegValue);
}
return ret;
}
uint16_t ch_presence_mm_to_samples(ch_dev_t *dev_ptr, uint16_t num_mm) {
uint32_t samples;
//2-way range, sample rate is op_frequency/8
#define DEN (8*343*1000)
#define NUM (2*num_mm*dev_ptr->op_frequency)
samples = (2*NUM + 3*DEN) / (2 * DEN); // NUM / DEM + 1.5 float-free
#undef NUM
#undef DEN
samples = (samples > dev_ptr->max_samples) ? dev_ptr->max_samples : samples;
return samples;
}

151
CHIRP/drivers/src/ch201_presence_fw.c Normal file
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@@ -0,0 +1,151 @@
//Chirp Microsystems Firmware Header Generator
//File generated from presence_v22.hex at 2020-04-27 13:52:22.081000 by rprzybyla
#include <stdint.h>
#include "ch201.h"
#include "ch201_presence.h"
const char * ch201_presence_version = "presence_v22.hex";
#define RAM_INIT_ADDRESS 2030
#define RAM_INIT_WRITE_SIZE 14
uint16_t get_ch201_presence_fw_ram_init_addr(void) { return (uint16_t)RAM_INIT_ADDRESS;}
uint16_t get_ch201_presence_fw_ram_init_size(void) { return (uint16_t)RAM_INIT_WRITE_SIZE;}
const unsigned char ram_ch201_presence_init[RAM_INIT_WRITE_SIZE] = {
0x00, 0x00, 0x64, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x01, 0x00, };
const unsigned char * get_ram_ch201_presence_init_ptr(void) { return &ram_ch201_presence_init[0];}
const unsigned char ch201_presence_fw[CH101_FW_SIZE] = {
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};

846
CHIRP/drivers/src/ch_api.c Normal file
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@@ -0,0 +1,846 @@
/*! \file ch_api.c
\brief Chirp SonicLib public API functions for using the Chirp ultrasonic sensor.
The user should not need to edit this file. This file relies on hardware interface
functions declared in ch_bsp.h and supplied in the board support package (BSP) for
the specific hardware platform being used.
*/
/*
Copyright <20> 2019-2021 Chirp Microsystems. All rights reserved.
Chirp Microsystems CONFIDENTIAL
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the authors of this program by email at support@chirpmicro.com
or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
*/
#include "soniclib.h"
#include "ch_driver.h"
#include "chirp_bsp.h"
#include "ch_math_utils.h"
#include "soniclib.h"
// /*!
// * \brief Initialize a Chirp ultrasonic sensor descriptor structure
// *
// * \param dev_ptr a pointer to the ch_dev_t config structure for a sensor
// *
// * \return 0 (RET_OK) if successful, non-zero otherwise
// *
// */
uint8_t ch_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t dev_num, ch_fw_init_func_t fw_init_func) {
uint8_t ret_val = RET_ERR;
ch_i2c_info_t i2c_info;
if (fw_init_func != NULL) {
/* Get I2C parameters from BSP */
ret_val = chbsp_i2c_get_info(grp_ptr, dev_num, &i2c_info);
if (ret_val == RET_OK) {
/* Save special handling flags for Chirp driver */
grp_ptr->i2c_drv_flags = i2c_info.drv_flags;
/* Call asic f/w init function passed in as parameter */
ret_val = (*fw_init_func)(dev_ptr, grp_ptr, i2c_info.address, dev_num, i2c_info.bus_num);
}
}
return ret_val;
}
uint8_t ch_get_config(ch_dev_t *dev_ptr, ch_config_t *config_ptr) {
uint8_t ret_val = 0;
config_ptr->mode = dev_ptr->mode;
config_ptr->max_range = dev_ptr->max_range;
config_ptr->static_range = dev_ptr->static_range;
config_ptr->sample_interval = dev_ptr->sample_interval;
config_ptr->thresh_ptr = NULL; // thresholds not returned here - use ch_get_thresholds()
return ret_val;
}
uint8_t ch_set_config(ch_dev_t *dev_ptr, ch_config_t *config_ptr) {
uint8_t ret_val = 0;
ret_val = ch_set_max_range(dev_ptr, config_ptr->max_range); // set max range
if (!ret_val) {
if (dev_ptr->api_funcs.set_static_range != NULL) { // if STR supported
ret_val = ch_set_static_range(dev_ptr, config_ptr->static_range); // set static target rejection range
if (!ret_val) {
dev_ptr->static_range = config_ptr->static_range;
}
}
}
if (!ret_val) {
if (config_ptr->sample_interval != 0) {
ret_val = ch_set_sample_interval(dev_ptr, config_ptr->sample_interval); // set sample interval (free-run mode only)
}
}
if (!ret_val) {
dev_ptr->sample_interval = config_ptr->sample_interval; // store sample interval
if (dev_ptr->api_funcs.set_thresholds != NULL) { // if multi-thresholds supported
ret_val = ch_set_thresholds(dev_ptr, config_ptr->thresh_ptr); // set multiple thresholds
}
}
if (!ret_val) {
if (dev_ptr->api_funcs.set_target_interrupt != NULL) { // if target interrupt mode supported
ret_val = ch_set_target_interrupt(dev_ptr, config_ptr->enable_target_int); // enable/disable target detect interrupt
}
}
if (!ret_val) {
if (dev_ptr->api_funcs.set_time_plan != NULL) { // if SonicSync time plans supported
ret_val = ch_set_time_plan(dev_ptr,config_ptr->time_plan); // set time plan (sonicsync only)
}
}
if (!ret_val) {
ret_val = ch_set_mode(dev_ptr, config_ptr->mode); // set operating mode last
}
if (!ret_val) {
dev_ptr->mode = config_ptr->mode;
}
return ret_val;
}
uint8_t ch_group_start(ch_group_t *grp_ptr) {
uint8_t ret_val;
ret_val = chdrv_group_start(grp_ptr);
return ret_val;
}
// void ch_trigger(ch_dev_t *dev_ptr) {
// chdrv_hw_trigger(dev_ptr);
// }
void ch_group_trigger(ch_group_t *grp_ptr) {
chdrv_group_hw_trigger(grp_ptr);
}
// void ch_reset(ch_dev_t *dev_ptr, ch_reset_t reset_type) {
// if (reset_type == CH_RESET_HARD) {
// chdrv_group_hard_reset(dev_ptr->group); // TODO need single device hard reset
// } else {
// chdrv_soft_reset(dev_ptr);
// }
// }
// void ch_group_reset(ch_group_t *grp_ptr, ch_reset_t reset_type) {
// if (reset_type == CH_RESET_HARD) {
// chdrv_group_hard_reset(grp_ptr);
// } else {
// chdrv_group_soft_reset(grp_ptr);
// }
// }
uint8_t ch_sensor_is_connected(ch_dev_t *dev_ptr) {
return dev_ptr->sensor_connected;
}
uint16_t ch_get_part_number(ch_dev_t *dev_ptr) {
return dev_ptr->part_number;
}
uint8_t ch_get_dev_num(ch_dev_t *dev_ptr) {
return dev_ptr->io_index;
}
ch_dev_t *ch_get_dev_ptr(ch_group_t *grp_ptr, uint8_t dev_num) {
return grp_ptr->device[dev_num];
}
uint8_t ch_get_i2c_address(ch_dev_t *dev_ptr) {
return dev_ptr->i2c_address;
}
uint8_t ch_get_i2c_bus(ch_dev_t *dev_ptr) {
return dev_ptr->i2c_bus_index;
}
uint8_t ch_get_num_ports(ch_group_t *grp_ptr) {
return grp_ptr->num_ports;
}
const char *ch_get_fw_version_string(ch_dev_t *dev_ptr) {
return dev_ptr->fw_version_string;
}
ch_mode_t ch_get_mode(ch_dev_t *dev_ptr) {
return dev_ptr->mode;
}
uint8_t ch_set_mode(ch_dev_t *dev_ptr, ch_mode_t mode) {
int ret_val = RET_ERR;
ch_set_mode_func_t func_ptr = dev_ptr->api_funcs.set_mode;
if (func_ptr != NULL) {
ret_val = (*func_ptr)(dev_ptr, mode);
}
if (ret_val == 0) {
dev_ptr->mode = mode;
}
return ret_val;
}
// uint16_t ch_get_sample_interval(ch_dev_t *dev_ptr) {
// uint16_t sample_interval = 0;
// if (dev_ptr->mode == CH_MODE_FREERUN) {
// sample_interval = dev_ptr->sample_interval;
// }
// return sample_interval;
// }
uint8_t ch_set_sample_interval(ch_dev_t *dev_ptr, uint16_t sample_interval) {
int ret_val = RET_ERR;
ch_set_sample_interval_func_t func_ptr = dev_ptr->api_funcs.set_sample_interval;
if (func_ptr != NULL) {
ret_val = (*func_ptr)(dev_ptr, sample_interval);
}
return ret_val;
}
uint16_t ch_get_num_samples(ch_dev_t *dev_ptr) {
return dev_ptr->num_rx_samples;
}
uint8_t ch_set_num_samples(ch_dev_t *dev_ptr, uint16_t num_samples) {
uint8_t ret_val = RET_ERR;
ch_set_num_samples_func_t func_ptr = dev_ptr->api_funcs.set_num_samples;
if (func_ptr != NULL) {
ret_val = (*func_ptr)(dev_ptr, num_samples);
}
dev_ptr->max_range = ch_samples_to_mm(dev_ptr, num_samples); // store corresponding range in mm
return ret_val;
}
uint16_t ch_get_max_range(ch_dev_t *dev_ptr) {
return dev_ptr->max_range;
}
uint8_t ch_set_max_range(ch_dev_t *dev_ptr, uint16_t max_range) {
uint8_t ret_val = RET_ERR;
ch_set_max_range_func_t func_ptr = dev_ptr->api_funcs.set_max_range;
if (func_ptr != NULL) {
ret_val = (*func_ptr)(dev_ptr, max_range);
}
return ret_val;
}
uint16_t ch_get_max_samples(ch_dev_t *dev_ptr) {
return dev_ptr->max_samples;
}
// uint8_t ch_get_sample_window(ch_dev_t *dev_ptr, uint16_t *start_sample_ptr, uint16_t *num_samples_ptr) {
// uint8_t ret_val = RET_ERR;
// if ((start_sample_ptr != NULL) && (num_samples_ptr != NULL)) {
// *start_sample_ptr = dev_ptr->win_start_sample;
// *num_samples_ptr = dev_ptr->num_win_samples;
// ret_val = RET_OK;
// }
// return ret_val;
// }
// uint8_t ch_set_sample_window(ch_dev_t *dev_ptr, uint16_t start_sample, uint16_t num_samples) {
// uint8_t ret_val = RET_ERR;
// ch_set_sample_window_func_t func_ptr = dev_ptr->api_funcs.set_sample_window;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, start_sample, num_samples);
// }
// return ret_val;
// }
// uint16_t ch_get_static_range(ch_dev_t *dev_ptr) {
// return dev_ptr->static_range;
// }
uint8_t ch_set_static_range(ch_dev_t *dev_ptr, uint16_t num_samples) {
uint8_t ret_val = RET_OK;
ch_set_static_range_func_t func_ptr = dev_ptr->api_funcs.set_static_range;
if (func_ptr != NULL) {
ret_val = (*func_ptr)(dev_ptr, num_samples);
}
return ret_val;
}
uint32_t ch_get_range(ch_dev_t *dev_ptr, ch_range_t range_type) {
uint32_t range = 0;
ch_get_range_func_t func_ptr = dev_ptr->api_funcs.get_range;
if (func_ptr != NULL) {
range = (*func_ptr)(dev_ptr, range_type);
}
return range;
}
// uint32_t ch_get_tof_us(ch_dev_t *dev_ptr) {
// uint32_t tof_us = 0;
// ch_get_tof_us_func_t func_ptr = dev_ptr->api_funcs.get_tof_us;
// if (func_ptr != NULL) {
// tof_us = (*func_ptr)(dev_ptr);
// }
// return tof_us;
// }
uint16_t ch_get_amplitude(ch_dev_t *dev_ptr) {
int amplitude = 0;
ch_get_amplitude_func_t func_ptr = dev_ptr->api_funcs.get_amplitude;
if (func_ptr != NULL) {
amplitude = (*func_ptr)(dev_ptr);
}
return amplitude;
}
// uint16_t ch_get_amplitude_avg(ch_dev_t *dev_ptr) {
// uint16_t amplitude_avg = 0;
// ch_get_amplitude_avg_func_t func_ptr = dev_ptr->api_funcs.get_amplitude_avg;
// if (func_ptr != NULL) {
// amplitude_avg = (*func_ptr)(dev_ptr);
// }
// return amplitude_avg;
// }
// uint8_t ch_get_amplitude_data(ch_dev_t *dev_ptr, uint16_t *amp_buf_ptr, uint16_t start_sample, uint16_t num_samples,
// ch_io_mode_t mode) {
// uint16_t error = RET_ERR;
// ch_get_amplitude_data_func_t func_ptr = dev_ptr->api_funcs.get_amplitude_data;
// if (func_ptr != NULL) {
// error = (*func_ptr)(dev_ptr, amp_buf_ptr, start_sample, num_samples, mode);
// }
// return error;
// }
// uint16_t ch_get_bandwidth(ch_dev_t *dev_ptr) {
// return dev_ptr->bandwidth;
// }
// uint8_t ch_set_frequency(ch_dev_t *dev_ptr, uint32_t target_freq_Hz) {
// int ret_val = RET_ERR;
// ch_set_frequency_func_t func_ptr = dev_ptr->api_funcs.set_frequency;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, target_freq_Hz);
// }
// return ret_val;
// }
uint32_t ch_get_frequency(ch_dev_t *dev_ptr) {
return dev_ptr->op_frequency;
}
uint16_t ch_get_rtc_cal_pulselength(ch_dev_t *dev_ptr) {
return dev_ptr->group->rtc_cal_pulse_ms;
}
uint16_t ch_get_rtc_cal_result(ch_dev_t *dev_ptr) {
return dev_ptr->rtc_cal_result;
}
// uint16_t ch_get_scale_factor(ch_dev_t *dev_ptr) {
// return dev_ptr->scale_factor;
// }
uint8_t ch_get_iq_data(ch_dev_t *dev_ptr, ch_iq_sample_t *buf_ptr, uint16_t start_sample, uint16_t num_samples, ch_io_mode_t mode) {
int ret_val = RET_ERR;
ch_get_iq_data_func_t func_ptr = dev_ptr->api_funcs.get_iq_data;
if (func_ptr != NULL) {
ret_val = (*func_ptr)(dev_ptr, buf_ptr, start_sample, num_samples, mode);
}
return ret_val;
}
uint16_t ch_samples_to_mm(ch_dev_t *dev_ptr, uint16_t num_samples) {
int num_mm = 0;
ch_samples_to_mm_func_t func_ptr = dev_ptr->api_funcs.samples_to_mm;
if (func_ptr != NULL) {
num_mm = (*func_ptr)(dev_ptr, num_samples);
}
return num_mm;
}
// uint16_t ch_mm_to_samples(ch_dev_t *dev_ptr, uint16_t num_mm) {
// int num_samples = 0;
// ch_mm_to_samples_func_t func_ptr = dev_ptr->api_funcs.mm_to_samples;
// if (func_ptr != NULL) {
// num_samples = (*func_ptr)(dev_ptr, num_mm);
// }
// return num_samples;
// }
// uint8_t ch_set_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index, uint16_t amplitude) {
// int ret_val = RET_ERR;
// ch_set_threshold_func_t func_ptr = dev_ptr->api_funcs.set_threshold;
// if ((func_ptr != NULL)) {
// ret_val = (*func_ptr)(dev_ptr, threshold_index, amplitude);
// }
// return ret_val;
// }
// uint16_t ch_get_threshold(ch_dev_t *dev_ptr, uint8_t threshold_index) {
// uint16_t amplitude = 0;
// ch_get_threshold_func_t func_ptr = dev_ptr->api_funcs.get_threshold;
// if ((func_ptr != NULL)) {
// amplitude = (*func_ptr)(dev_ptr, threshold_index);
// }
// return amplitude;
// }
uint16_t ch_iq_to_amplitude(ch_iq_sample_t *iq_sample) {
uint32_t amplitude;
uint32_t i_sq = ((uint32_t) iq_sample->i * (uint32_t) iq_sample->i);
uint32_t q_sq = ((uint32_t) iq_sample->q * (uint32_t) iq_sample->q);
amplitude = sqrt_int32(i_sq + q_sq);
return (uint16_t) amplitude;
}
uint8_t ch_set_thresholds(ch_dev_t *dev_ptr, ch_thresholds_t *thresh_ptr) {
int ret_val = RET_ERR;
ch_set_thresholds_func_t func_ptr = dev_ptr->api_funcs.set_thresholds;
if ((func_ptr != NULL) && (thresh_ptr != NULL)) {
ret_val = (*func_ptr)(dev_ptr, thresh_ptr);
}
return ret_val;
}
uint8_t ch_get_thresholds(ch_dev_t *dev_ptr, ch_thresholds_t *thresh_ptr) {
int ret_val = RET_ERR;
ch_get_thresholds_func_t func_ptr = dev_ptr->api_funcs.get_thresholds;
if ((func_ptr != NULL) && (thresh_ptr != NULL)) {
ret_val = (*func_ptr)(dev_ptr, thresh_ptr);
}
return ret_val;
}
uint8_t ch_set_time_plan(ch_dev_t *dev_ptr, ch_time_plan_t time_plan) {
uint8_t ret_val = RET_ERR;
ch_set_time_plan_func_t func_ptr = dev_ptr->api_funcs.set_time_plan;
if (func_ptr != NULL) {
ret_val = (*func_ptr)(dev_ptr, time_plan);
}
return ret_val;
}
// ch_time_plan_t ch_get_time_plan(ch_dev_t *dev_ptr) {
// ch_time_plan_t time_plan = CH_TIME_PLAN_NONE;
// ch_get_time_plan_func_t func_ptr = dev_ptr->api_funcs.get_time_plan;
// if (func_ptr != NULL) {
// time_plan = (*func_ptr)(dev_ptr);
// }
// return time_plan;
// }
// /*!
// * \brief Start a non-blocking sensor readout
// *
// * \param grp_ptr pointer to the ch_group_t descriptor structure for a group of sensors
// *
// * This function starts a non-blocking I/O operation on the specified group of sensors.
// */
// uint8_t ch_io_start_nb(ch_group_t *grp_ptr) {
// uint8_t ret_val = 1;
// if (grp_ptr->io_complete_callback != NULL) { // only start I/O if there is a callback function
// chdrv_group_i2c_start_nb(grp_ptr);
// ret_val = 0;
// }
// return ret_val;
// }
/*!
* \brief Set callback function for Chirp sensor I/O interrupt
*
* \note
*/
void ch_io_int_callback_set(ch_group_t *grp_ptr, ch_io_int_callback_t callback_func_ptr) {
grp_ptr->io_int_callback = callback_func_ptr;
}
/*!
* \brief Set callback function for Chirp sensor I/O operation complete
*
* \note
*/
void ch_io_complete_callback_set(ch_group_t *grp_ptr, ch_io_complete_callback_t callback_func_ptr) {
grp_ptr->io_complete_callback = callback_func_ptr;
}
// /*!
// * \brief Continue a non-blocking readout
// *
// * \param grp_ptr pointer to the ch_group_t config structure for a group of sensors
// * \param i2c_bus_index index value identifying I2C bus within group
// *
// * Call this function once from your I2C interrupt handler each time it completes an I/O operation.
// * It will call the function previously specified during \a ch_io_complete_callback_set() when all group
// * transactions are complete.
// */
// void ch_io_notify(ch_group_t *grp_ptr, uint8_t i2c_bus_index) {
// chdrv_group_i2c_irq_handler(grp_ptr, i2c_bus_index);
// }
uint8_t ch_set_target_interrupt(ch_dev_t *dev_ptr, uint8_t enable) {
int ret_val = RET_ERR;
ch_set_target_interrupt_func_t func_ptr = dev_ptr->api_funcs.set_target_interrupt;
if (func_ptr != NULL) {
ret_val = (*func_ptr)(dev_ptr, enable);
}
return ret_val;
}
// uint8_t ch_get_target_interrupt(ch_dev_t *dev_ptr) {
// uint8_t enabled = 0;
// ch_get_target_interrupt_func_t func_ptr = dev_ptr->api_funcs.get_target_interrupt;
// if (func_ptr != NULL) {
// enabled = (*func_ptr)(dev_ptr);
// }
// return enabled;
// }
// uint8_t ch_set_static_coeff(ch_dev_t *dev_ptr, uint8_t static_coeff) {
// int ret_val = RET_ERR;
// ch_set_static_coeff_func_t func_ptr = dev_ptr->api_funcs.set_static_coeff;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, static_coeff);
// }
// return ret_val;
// }
// uint8_t ch_get_static_coeff(ch_dev_t *dev_ptr) {
// uint8_t statc_coeff = 0;
// ch_get_static_coeff_func_t func_ptr = dev_ptr->api_funcs.get_static_coeff;
// if (func_ptr != NULL) {
// statc_coeff = (*func_ptr)(dev_ptr);
// }
// return statc_coeff;
// }
// uint8_t ch_set_rx_holdoff(ch_dev_t *dev_ptr, uint16_t num_samples) {
// int ret_val = RET_ERR;
// ch_set_rx_holdoff_func_t func_ptr = dev_ptr->api_funcs.set_rx_holdoff;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, num_samples);
// }
// return ret_val;
// }
// uint16_t ch_get_rx_holdoff(ch_dev_t *dev_ptr) {
// uint16_t num_samples = 0;
// ch_get_rx_holdoff_func_t func_ptr = dev_ptr->api_funcs.get_rx_holdoff;
// if (func_ptr != NULL) {
// num_samples = (*func_ptr)(dev_ptr);
// }
// return num_samples;
// }
// uint8_t ch_set_rx_low_gain(ch_dev_t *dev_ptr, uint16_t num_samples) {
// uint8_t ret_val = RET_ERR;
// ch_set_rx_low_gain_func_t func_ptr = dev_ptr->api_funcs.set_rx_low_gain;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, num_samples);
// }
// return ret_val;
// }
uint16_t ch_get_rx_low_gain(ch_dev_t *dev_ptr) {
uint16_t num_samples = 0;
ch_get_rx_low_gain_func_t func_ptr = dev_ptr->api_funcs.get_rx_low_gain;
if (func_ptr != NULL) {
num_samples = (*func_ptr)(dev_ptr);
}
return num_samples;
}
// uint8_t ch_set_tx_length(ch_dev_t *dev_ptr, uint8_t tx_length) {
// int ret_val = RET_ERR;
// ch_set_tx_length_func_t func_ptr = dev_ptr->api_funcs.set_tx_length;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, tx_length);
// }
// return ret_val;
// }
// uint8_t ch_get_tx_length(ch_dev_t *dev_ptr) {
// uint8_t tx_length = 0;
// ch_get_tx_length_func_t func_ptr = dev_ptr->api_funcs.get_tx_length;
// if (func_ptr != NULL) {
// tx_length = (*func_ptr)(dev_ptr);
// }
// return tx_length;
// }
// uint8_t ch_get_rx_pulse_length(ch_dev_t *dev_ptr) {
// uint8_t rx_pulse_length = 0;
// ch_get_rx_pulse_length_func_t func_ptr = dev_ptr->api_funcs.get_rx_pulse_length;
// if (func_ptr != NULL) {
// rx_pulse_length = (*func_ptr)(dev_ptr);
// }
// return rx_pulse_length;
// }
void ch_set_rx_pretrigger(ch_group_t *grp_ptr, uint8_t enable) {
if (enable) {
chdrv_pretrigger_delay_set(grp_ptr, CHDRV_PRETRIGGER_DELAY_US);
} else {
chdrv_pretrigger_delay_set(grp_ptr, 0);
}
}
// uint8_t ch_get_rx_pretrigger(ch_group_t *grp_ptr) {
// uint8_t enabled = (grp_ptr->pretrig_delay_us != 0);
// return enabled;
// }
// // Check that CH101 and CH201 prog mem are the same (assumed by ch_check_program())
// #if ((CH101_PROG_MEM_ADDR != CH201_PROG_MEM_ADDR) || (CH101_PROG_MEM_SIZE != CH201_PROG_MEM_SIZE))
// #error Mismatch in CH101 and CH201 program address or size
// #endif
// uint8_t ch_check_program(ch_dev_t *dev_ptr) {
// const ch_group_t *grp_ptr = dev_ptr->group;
// const uint16_t addr = CH101_PROG_MEM_ADDR;
// const uint16_t num_bytes = CH101_PROG_MEM_SIZE;
// uint8_t num_transfers = (CH101_PROG_MEM_SIZE + (CH_PROG_XFER_SIZE - 1)) / CH_PROG_XFER_SIZE;
// uint16_t bytes_left = num_bytes; // remaining bytes to read
// uint8_t rx_buf[CH_PROG_XFER_SIZE];
// uint8_t error = 0;
// chbsp_program_enable(dev_ptr); // assert PROG line
// for (uint8_t xfer_num = 0; !error && (xfer_num < num_transfers); xfer_num++) {
// uint16_t bytes_to_read;
// uint8_t message[] = {(0x80 | CH_PROG_REG_CTL), 0x09}; // read burst command
// if (bytes_left > CH_PROG_XFER_SIZE) {
// bytes_to_read = CH_PROG_XFER_SIZE;
// } else {
// bytes_to_read = bytes_left;
// }
// /* Read bytes from program memory */
// chdrv_prog_write(dev_ptr, CH_PROG_REG_ADDR, (addr + (xfer_num * CH_PROG_XFER_SIZE)));
// chdrv_prog_write(dev_ptr, CH_PROG_REG_CNT, (CH_PROG_XFER_SIZE - 1));
// error = chdrv_prog_i2c_write(dev_ptr, message, sizeof(message));
// error |= chdrv_prog_i2c_read(dev_ptr, rx_buf, bytes_to_read);
// bytes_left -= bytes_to_read;
// /* Compare read bytes with original firmware image */
// if (!error) {
// for (uint16_t idx = 0; idx < CH_PROG_XFER_SIZE; idx++) {
// uint8_t *fw_ptr = ((uint8_t *)(dev_ptr->firmware) + (xfer_num * CH_PROG_XFER_SIZE));
// if (rx_buf[idx] != fw_ptr[idx]) {
// error = 1;
// break;
// }
// }
// }
// }
// chbsp_program_disable(dev_ptr); // de-assert PROG line
// if (grp_ptr->num_connected[dev_ptr->i2c_bus_index] > 1) { // if more than one device on this bus
// chbsp_delay_ms(10); // delay to let PROG interface settle
// }
// return error;
// }
// uint8_t ch_set_modulated_tx_data(ch_dev_t *dev_ptr, uint8_t tx_data) {
// int ret_val = RET_ERR;
// ch_set_modulated_tx_data_func_t func_ptr = dev_ptr->api_funcs.set_modulated_tx_data;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, tx_data);
// }
// return ret_val;
// }
// uint8_t ch_get_demodulated_rx_data(ch_dev_t *dev_ptr, uint8_t rx_pulse_length, uint8_t* data_ptr) {
// int ret_val = RET_ERR;
// ch_get_demodulated_rx_data_func_t func_ptr = dev_ptr->api_funcs.get_demodulated_rx_data;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, rx_pulse_length, data_ptr);
// }
// return ret_val;
// }
// uint8_t ch_set_cal_result(ch_dev_t *dev_ptr, ch_cal_result_t *cal_ptr) {
// int ret_val = RET_ERR;
// ch_set_cal_result_func_t func_ptr = dev_ptr->api_funcs.set_cal_result;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, cal_ptr);
// }
// return ret_val;
// }
// uint8_t ch_get_cal_result(ch_dev_t *dev_ptr, ch_cal_result_t *cal_ptr) {
// int ret_val = RET_ERR;
// ch_get_cal_result_func_t func_ptr = dev_ptr->api_funcs.get_cal_result;
// if (func_ptr != NULL) {
// ret_val = (*func_ptr)(dev_ptr, cal_ptr);
// }
// return ret_val;
// }

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CHIRP/drivers/src/ch_common.c Normal file
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CHIRP/drivers/src/ch_driver.c Normal file
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CHIRP/drivers/src/ch_math_utils.c Normal file
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@@ -0,0 +1,108 @@
/*!
* \file ch_math_utils.c
* \date July 20, 2017
* \author nparikh
* \copyright Copyright 2017-2021 Chirp Microsystems. All rights reserved.
* \brief Functions for performing fixed point arithmetic.
* https://github.com/dmoulding/log2fix
* https://github.com/chmike/fpsqrt
*
* Integer square root function:
* Algorithm and code Author Christophe Meessen 1993.
*/
#include <ch_math_utils.h>
fixed_t FP_sqrt(fixed_t x)
{
uint32_t t, q, b, r;
r = x;
b = 0x40000000;
q = 0;
while( b > 0x40 )
{
t = q + b;
if( r >= t )
{
r -= t;
q = t + b; // equivalent to q += 2*b
}
r <<= 1;
b >>= 1;
}
q >>= 8;
return q;
}
fixed_t FP_log2(fixed_t x)
{
// This implementation is based on Clay. S. Turner's fast binary logarithm
// algorithm[1].
fixed_t b = 1U << (FRACT_BITS - 1);
fixed_t y = 0;
size_t i;
fixed_t z;
if (x == 0) {
return 0; // represents negative infinity
}
while (x < 1U << FRACT_BITS) {
x <<= 1;
y -= 1U << FRACT_BITS;
}
while (x >= 2U << FRACT_BITS) {
x >>= 1;
y += 1U << FRACT_BITS;
}
z = x;
for (i = 0; i < FRACT_BITS; i++) {
z = FIXEDMUL(z, z);// >> FRACT_BITS;
if (z >= 2U << FRACT_BITS) {
z >>= 1;
y += b;
}
b >>= 1;
}
return y;
}
fixed_t FP_log(fixed_t x)
{
fixed_t y;
// macro value is in Q1.31 fomat, but we use Q16. shift in two steps to keep multiply precision
y = FIXEDMUL(FP_log2(x), (INV_LOG2_E_Q1DOT31 >> Q31_TO_Q16_SHIFT_1));
y >>= Q31_TO_Q16_SHIFT_2;
return y;
}
/*
* int32_t sqrt_int32( int32_t v );
*
* Compute int32_t to int32_t square root
* RETURNS the integer square root of v
* REQUIRES v is positive
*
* Algorithm and code Author Christophe Meessen 1993.
* Initially published in usenet comp.lang.c, Thu, 28 Jan 1993 08:35:23 GMT
*/
int32_t sqrt_int32( int32_t v )
{
uint32_t t, q, b, r;
r = v; // r = v - x<>
b = 0x40000000; // a<>
q = 0; // 2ax
while( b > 0 )
{
t = q + b; // t = 2ax + a<>
q >>= 1; // if a' = a/2, then q' = q/2
if( r >= t ) // if (v - x<>) >= 2ax + a<>
{
r -= t; // r' = (v - x<>) - (2ax + a<>)
q += b; // if x' = (x + a) then ax' = ax + a<>, thus q' = q' + b
}
b >>= 2; // if a' = a/2, then b' = b / 4
}
return q;
}

117
CHIRP/drivers/src/chbsp_dummy.c Normal file
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/*!
* \file chbsp_dummy.c
*
* \brief Dummy implementations of optional board support package IO functions allowing
* platforms to selectively support only needed functionality. These are placeholder
* routines that will satisfy references from other code to avoid link errors, but they
* do not peform any actual operations.
*
* See chirp_bsp.h for descriptions of all board support package interfaces, including
* details on these optional functions.
*/
/*
* Copyright <20> 2017-2019 Chirp Microsystems. All rights reserved.
*/
#include "chirp_bsp.h"
/* Functions supporting debugging */
__attribute__((weak)) void chbsp_debug_toggle(uint8_t __attribute__((unused)) dbg_pin_num) {}
__attribute__((weak)) void chbsp_debug_on(uint8_t __attribute__((unused)) dbg_pin_num) {}
__attribute__((weak)) void chbsp_debug_off(uint8_t __attribute__((unused)) dbg_pin_num) {}
__attribute__((weak)) void chbsp_print_str(char *str) {
(void)(str);
}
__attribute__((weak)) uint32_t chbsp_timestamp_ms() {
return 0;
}
__attribute__((weak)) int chbsp_i2c_deinit(void){
return 0;
}
/* Functions supporting interrupt-based operation */
__attribute__((weak)) void chbsp_group_io_interrupt_enable(ch_group_t *grp_ptr) {
(void)(grp_ptr);
}
__attribute__((weak)) void chbsp_io_interrupt_enable(ch_dev_t *dev_ptr) {
(void)(dev_ptr);
}
__attribute__((weak)) void chbsp_group_io_interrupt_disable(ch_group_t *grp_ptr) {
(void)(grp_ptr);
}
__attribute__((weak)) void chbsp_io_interrupt_disable(ch_dev_t *dev_ptr) {
(void)(dev_ptr);
}
/* Functions supporting non-blocking operation */
__attribute__((weak)) int chbsp_i2c_write_nb(ch_dev_t *dev_ptr, uint8_t *data, uint16_t num_bytes) {
(void)(dev_ptr);
(void)(data);
(void)(num_bytes);
return 1;
}
__attribute__((weak))
int chbsp_i2c_mem_write_nb(ch_dev_t *dev_ptr, uint16_t mem_addr, uint8_t *data, uint16_t num_bytes) {
(void)(dev_ptr);
(void)(mem_addr);
(void)(data);
(void)(num_bytes);
return 1;
}
__attribute__((weak)) int chbsp_i2c_read_nb(ch_dev_t *dev_ptr, uint8_t *data, uint16_t num_bytes) {
(void)(dev_ptr);
(void)(data);
(void)(num_bytes);
return 1;
}
__attribute__((weak)) int chbsp_i2c_mem_read_nb(ch_dev_t *dev_ptr, uint16_t mem_addr, uint8_t *data, uint16_t num_bytes) {
(void)(dev_ptr);
(void)(mem_addr);
(void)(data);
(void)(num_bytes);
return 1;
}
/* Functions supporting controlling int pins of individual sensors (originally only controllable in a group) */
__attribute__((weak)) void chbsp_set_io_dir_out(ch_dev_t *dev_ptr) {
(void)(dev_ptr);
}
__attribute__((weak)) void chbsp_set_io_dir_in(ch_dev_t *dev_ptr) {
(void)(dev_ptr);
}
__attribute__((weak)) void chbsp_io_clear(ch_dev_t *dev_ptr) {
(void)(dev_ptr);
}
__attribute__((weak)) void chbsp_io_set(ch_dev_t *dev_ptr) {
(void)(dev_ptr);
}
__attribute__((weak)) void chbsp_external_i2c_irq_handler(chdrv_i2c_transaction_t *trans){
(void)(trans);
}