213 lines
8.0 KiB
C
213 lines
8.0 KiB
C
/*!
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* \file ch101_finaltest.h
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*
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* \brief Internal definitions for the Chirp CH101 Finaltest sensor firmware.
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*
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* This file contains function definitions, register offsets and other interfaces
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* for use with the CH101 Finaltest sensor firmware. Many of these are designed for
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* compatibility with the Chirp Finaltest production test system.
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* These values are subject to change without notice.
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*
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* You should not need to edit this file or call the driver functions directly. Doing so
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* will reduce your ability to benefit from future enhancements and releases from Chirp.
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*
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*/
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/*
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* Copyright © 2016-2020, Chirp Microsystems. All rights reserved.
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*
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* Chirp Microsystems CONFIDENTIAL
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You can contact the authors of this program by email at support@chirpmicro.com
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* or by mail at 2560 Ninth Street, Suite 220A, Berkeley, CA 94710.
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*/
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#ifndef CH101_FINALTEST_H_
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#define CH101_FINALTEST_H_
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#include "ch101.h"
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#include "soniclib.h"
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#include <stddef.h>
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#include <stdint.h>
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// finaltest firmware registers
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#define CH101_FINALTEST_REG_REGMAPFMT 0x00
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#define CH101_FINALTEST_REG_OPMODE 0x01
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#define CH101_FINALTEST_REG_TICK_INTERVAL 0x02
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#define CH101_FINALTEST_REG_WBCFG 0x04
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#define CH101_FINALTEST_REG_PERIOD 0x05
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#define CH101_FINALTEST_REG_CAL_TRIG 0x06
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#define CH101_FINALTEST_REG_MAX_RANGE 0x07
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#define CH101_FINALTEST_REG_DCOSTART 0x08
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#define CH101_FINALTEST_REG_CAL_RESULT 0x0A
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#define CH101_FINALTEST_REG_DCOSTOP 0x0C
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#define CH101_FINALTEST_REG_TXLENGTH 0x0E
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#define CH101_FINALTEST_REG_READY 0x0F
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#define CH101_FINALTEST_REG_PULSE_WIDTH 0x10
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#define CH101_FINALTEST_REG_HOLDOFF 0x11
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#define CH101_FINALTEST_REG_THRESHOLD 0x12
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#define CH101_FINALTEST_REG_RXQUEUE 0x14
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#define CH101_FINALTEST_REG_TOF_SF 0x22
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#define CH101_FINALTEST_REG_TOF 0x24
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#define CH101_FINALTEST_REG_AMPLITUDE 0x26
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#define CH101_FINALTEST_REG_DCOCODE 0x28
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#define CH101_FINALTEST_REG_DATA 0x2A
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// Maximum number of samples that can be stored; max value of MAX_RANGE
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#define CH101_FINALTEST_MAX_SAMPLES 150
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// Number of RXQUEUE 16-bit entries
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#define CH101_FINALTEST_RXQUEUE_ITEMS 7
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// Bit width of each field in RXQUEUE items
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#define CH101_FINALTEST_RXQUEUE_BITS_SAMPLES 7
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#define CH101_FINALTEST_RXQUEUE_BITS_ATTEN 2
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#define CH101_FINALTEST_RXQUEUE_BITS_GAIN 3
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// Position of lowest bit in each field of RXQUEUE items
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#define CH101_FINALTEST_RXQUEUE_BITPOS_SAMPLES 3
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#define CH101_FINALTEST_RXQUEUE_BITPOS_ATTEN (CH101_FINALTEST_RXQUEUE_BITPOS_SAMPLES + CH101_FINALTEST_RXQUEUE_BITS_SAMPLES)
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#define CH101_FINALTEST_RXQUEUE_BITPOS_GAIN (CH101_FINALTEST_RXQUEUE_BITPOS_ATTEN + CH101_FINALTEST_RXQUEUE_BITS_ATTEN)
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// Values for Rx attenuation IN RXQUEUE items
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#define CH101_FINALTEST_RXQUEUE_ATTEN120 0
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#define CH101_FINALTEST_RXQUEUE_ATTEN60 1
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#define CH101_FINALTEST_RXQUEUE_ATTEN30 2
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#define CH101_FINALTEST_RXQUEUE_ATTEN1 3
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// Values for Rx gain IN RXQUEUE items
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#define CH101_FINALTEST_RXQUEUE_GAIN1P6 0
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#define CH101_FINALTEST_RXQUEUE_GAIN3P8 1
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#define CH101_FINALTEST_RXQUEUE_GAIN5P7 2
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#define CH101_FINALTEST_RXQUEUE_GAIN12P3 3
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#define CH101_FINALTEST_RXQUEUE_GAIN25P6 4
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// Enumerated values for various registers
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#define CH101_FINALTEST_OPMODE_IDLE 0x00
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#define CH101_FINALTEST_OPMODE_FREERUN 0x02
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#define CH101_FINALTEST_OPMODE_TRIGGERED 0x10
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#define CH101_FINALTEST_OPMODE_RX_ONLY 0x20
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#define CH101_FINALTEST_PERIOD_IDLE 0
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#define CH101_FINALTEST_TICK_INTERVAL_IDLE 2048
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#define CH101_FINALTEST_READY_NOTLOCKED 0x00
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#define CH101_FINALTEST_READY_NOTREADY 0x01
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#define CH101_FINALTEST_READY_FREQ_LOCKED_BM 0x04
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// ASIC firmware linkage
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extern const char *ch101_finaltest_version; // version string in fw .c file
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extern const uint8_t ch101_finaltest_fw[CH101_FW_SIZE];
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const unsigned char * get_ram_ch101_finaltest_init_ptr(void);
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uint16_t get_ch101_finaltest_fw_ram_init_addr(void);
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uint16_t get_ch101_finaltest_fw_ram_init_size(void);
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uint8_t ch101_finaltest_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t io_index, uint8_t i2c_bus_index);
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typedef enum { // XXX redundant definition from soniclib.h to resolve circular #include's
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CH101_FINALTEST_RANGE_ECHO_ONE_WAY = 0, /*!< One way - gets full pulse/echo distance & divides by 2. */
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CH101_FINALTEST_RANGE_ECHO_ROUND_TRIP = 1, /*!< Round trip - full pulse/echo distance. */
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CH101_FINALTEST_RANGE_DIRECT = 2, /*!< Direct - for receiving node in pitch-catch mode. */
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} ch101_finaltest_range_t;
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/*!
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* \brief Write an entry into the receive settings queue
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*
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* \param dev_ptr a pointer to the ch_dev_t device descriptor
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* \param queue_index which position in the queue to write this item
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* \param samples sample count for which these settings will be in effect, Range of values 1-127
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* \param attenuation Range of values 0-3, see Final Test interface description
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* \param gain Range of values 0-4, see Final Test interface description
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*/
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uint8_t ch101_finaltest_set_rxqueue_item( ch_dev_t* dev_ptr, uint8_t queue_index,
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uint8_t samples, uint8_t attenuation, uint8_t gain );
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/*!
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* \brief Configure threshold of detection.
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*
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* \param dev_ptr a pointer to the ch_dev_t device descriptor
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* \param threshold minimum received echo intensity for detecting a target
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*
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* \return 0 if successful.
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*/
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uint8_t ch101_finaltest_set_threshold(ch_dev_t *dev_ptr, uint16_t threshold);
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uint32_t ch101_finaltest_get_range(ch_dev_t *dev_ptr, ch101_finaltest_range_t range_type);
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/*!
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* \brief Gets measured amplitude from the sensor.
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*
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* \param dev_ptr a pointer to the ch_dev_t device descriptor
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*
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* This function reads back the amplitude from the sensor. The amplitude is representative of the incoming sound pressure.
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*
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* \return Amplitude (arbitrary units).
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*/
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uint16_t ch101_finaltest_get_amplitude(ch_dev_t *dev_ptr);
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/*!
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* \brief Reads IQ data from sensor and places it into specified buffer.
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* \param dev_ptr Pointer to the ch_dev_t device descriptor
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* \param buf_ptr Buffer to which to store IQ data
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* \param start_sample starting sample of requested I/Q data
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* \param num_samples number of samples to return I/Q for
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* \param mode I/O mode - must be CH_IO_MODE_BLOCK
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* \return 0 on success, nonzero on failure
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*/
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uint8_t ch101_finaltest_get_iq_data(ch_dev_t *dev_ptr, uint8_t /*ch_iq_sample_t*/ *buf_ptr, uint16_t start_sample, uint16_t num_samples,
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uint8_t /*ch_io_mode_t*/ mode);
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/*!
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* \brief Check if the sensor has completed its start-up calibration (locking) procedure.
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*
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* \param dev_ptr a pointer to the ch_dev_t device descriptor
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*
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* \return 1 if the sensor is locked, 0 otherwise.
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*/
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uint8_t ch101_finaltest_get_locked_state(ch_dev_t *dev_ptr);
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void ch101_finaltest_store_pt_result(ch_dev_t *dev_ptr);
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void ch101_finaltest_store_op_freq(ch_dev_t *dev_ptr);
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void ch101_finaltest_store_bandwidth(ch_dev_t *dev_ptr);
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void ch101_finaltest_store_scale_factor(ch_dev_t *dev_ptr);
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int ch101_finaltest_set_pulse_width(ch_dev_t *dev_ptr,uint8_t pulse_width);
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int ch101_finaltest_set_tx_length(ch_dev_t *dev_ptr, uint8_t tx_length);
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uint32_t ch101_finaltest_get_op_freq(ch_dev_t *dev_ptr);
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#endif /* CH101_FINALTEST_H_ */
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