100 lines
3.7 KiB
C
100 lines
3.7 KiB
C
/*! \file ch101_gppc.h
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*
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* \brief Internal definitions for the Chirp CH101 GPPC sensor firmware.
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*
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* This file contains register offsets and other values for use with the CH101 GPPC
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* sensor firmware. These values are subject to change without notice.
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*
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* You should not need to edit this file or call the driver functions directly. Doing so
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* will reduce your ability to benefit from future enhancements and releases from Chirp.
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*
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*/
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/*
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* Copyright © 2016-2020, Chirp Microsystems. All rights reserved.
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*
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* Chirp Microsystems CONFIDENTIAL
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL CHIRP MICROSYSTEMS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You can contact the authors of this program by email at support@chirpmicro.com
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* or by mail at 2560 Ninth Street, Suite 220, Berkeley, CA 94710.
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*/
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#ifndef CH101_GPPC_H_
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#define CH101_GPPC_H_
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#include "ch101.h"
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#include "soniclib.h"
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#include <stdint.h>
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/* GPPC firmware registers */
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#define CH101_GPPC_REG_OPMODE 0x01
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#define CH101_GPPC_REG_TICK_INTERVAL 0x02
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#define CH101_GPPC_REG_I2C_READ_OFFSET 0x04
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#define CH101_GPPC_REG_PERIOD 0x05
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#define CH101_GPPC_REG_CAL_TRIG 0x06
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#define CH101_GPPC_REG_MAX_RANGE 0x07
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#define CH101_GPPC_REG_TX_LENGTH 0x08
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#define CH101_GPPC_REG_CAL_RESULT 0x0A
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#define CH101_GPPC_REG_DCO_SET 0x0C
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#define CH101_GPPC_REG_THRESHOLD 0x0E
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#define CH101_GPPC_REG_TX_BITS 0x10
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#define CH101_GPPC_REG_RX_HOLDOFF 0x11
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#define CH101_GPPC_REG_ST_COEFF 0x13
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#define CH101_GPPC_REG_READY 0x14
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#define CH101_GPPC_REG_BIT_LENGTH 0x15
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#define CH101_GPPC_REG_TOF_SF 0x16
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#define CH101_GPPC_REG_TOF 0x18
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#define CH101_GPPC_REG_AMPLITUDE 0x1A
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#define CH101_GPPC_REG_RX_PULSE_LENGTH 0x1C
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#define CH101_GPPC_REG_DATA 0x1E
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#define CH101_GPPC_MAX_SAMPLES (350)
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#define CH101_GPPC_READY_FREQ_LOCKED (0x04)
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#define CH101_GPPC_THRESHOLD_NUMBER 1
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#define CH_SF_LOCK_FOUND (0)
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#define CH_SF_LOCK_START (1)
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#define CH_DCO_LOW 100
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#define CH_DCO_HIGH 250
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#define CH_DCO_SEARCH_THRESHOLD 100 //Hz, if error is above this, do a search
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#define DEBUG_DCO_SEARCH(X) X
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//#define DEBUG_DCO_SEARCH(X)
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/* signal modulation */
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#define CH_TXMOD_DATA_MAX (31) /* max value of the modulated Tx data set by users*/
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#define MAX_NUM_OF_MOD_DATA (8) /* max number of modulated data */
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#define MAX_FUDGE_FACTOR (5)
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#define CH_PARITY_BIT (5) /* parity bit of Tx bits */
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#define CH_TXBITS_BITMASK (0x40) /* bit mask for Tx bits */
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#define CH_RXDEMOD_DATA_BITMASK (0x1F) /* bit mask for demodulated RX data */
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extern const char *ch101_gppc_version; // version string in fw .c file
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extern const uint8_t ch101_gppc_fw[CH101_FW_SIZE];
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uint16_t get_ch101_gppc_fw_ram_init_addr(void);
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uint16_t get_ch101_gppc_fw_ram_init_size(void);
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const unsigned char * get_ram_ch101_gppc_init_ptr(void);
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uint8_t ch101_gppc_init(ch_dev_t *dev_ptr, ch_group_t *grp_ptr, uint8_t i2c_addr, uint8_t dev_num, uint8_t i2c_bus_index);
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uint32_t ch101_gppc_set_new_dco_code(ch_dev_t *dev_ptr, uint16_t dcocode);
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uint8_t ch101_gppc_set_frequency(ch_dev_t *dev_ptr, uint32_t target_freq_Hz);
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#endif
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