hulk/gd32e23x_template_cmake_vscode
Template
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
Files
8872b5ae57d335d16f89a5ff0e444505cd39fdac
gd32e23x_template_cmake_vscode/Src/i2c.c
T

798 lines
26 KiB
C
Raw Blame History

//
// Created by dell on 24-12-20.
//
#include "i2c.h"
/*!
\brief configure the GPIO ports
\param[in] none
\param[out] none
\retval none
*/
void i2c_gpio_config(void) {
/* enable IIC GPIO clock */
rcu_periph_clock_enable(RCU_GPIO_I2C);
/* connect I2C_SCL_PIN to I2C_SCL */
gpio_af_set(I2C_SCL_PORT, I2C_GPIO_AF, I2C_SCL_PIN);
/* connect I2C_SDA_PIN to I2C_SDA */
gpio_af_set(I2C_SDA_PORT, I2C_GPIO_AF, I2C_SDA_PIN);
/* configure GPIO pins of I2C */
gpio_mode_set(I2C_SCL_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, I2C_SCL_PIN);
gpio_output_options_set(I2C_SCL_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SCL_PIN);
gpio_mode_set(I2C_SDA_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, I2C_SDA_PIN);
gpio_output_options_set(I2C_SDA_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SDA_PIN);
}
/*!
\brief configure the I2CX interface
\param[in] none
\param[out] none
\retval none
*/
i2c_result_t i2c_config(void) {
/* configure I2C GPIO */
i2c_gpio_config();
/* enable I2C clock */
rcu_periph_clock_enable(RCU_I2C);
/* configure I2C clock */
i2c_clock_config(I2C0, I2C_SPEED, I2C_DTCY_2);
/* configure I2C address */
i2c_mode_addr_config(I2C0, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, 0xA0);
/* enable I2CX */
i2c_enable(I2C0);
/* enable acknowledge */
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
return I2C_RESULT_SUCCESS;
}
/* wait for SCL to go high, return true if successful, false if timeout */
static bool i2c_wait_scl_high(uint16_t max_wait_time) {
while (max_wait_time--) {
if (gpio_input_bit_get(I2C_SCL_PORT, I2C_SCL_PIN)) {
return true;
}
delay_10us(1);
}
return false;
}
/* generate one manual SCL pulse; return true if SCL observed high (no stuck/overstretch) */
static bool i2c_generate_scl_pulse(void) {
GPIO_BC(I2C_SCL_PORT) = I2C_SCL_PIN; /* drive SCL low */
delay_10us(1);
GPIO_BOP(I2C_SCL_PORT) = I2C_SCL_PIN; /* release SCL (open-drain -> high via pull-up) */
return i2c_wait_scl_high(200); /* wait up to ~2ms for clock stretching release */
}
/*!
\brief reset I2C bus
\param[in] none
\param[out] none
\retval none
*/
i2c_result_t i2c_bus_reset(void) {
/* 1. Disable & deinit peripheral so pins can be fully controlled */
i2c_disable(I2C0);
i2c_deinit(I2C0);
#if DEBUG_VERBOSE == CFG_ENABLE
printf("I2C bus reset\r\n");
#endif
/* 2. Configure SCL/SDA as GPIO open-drain outputs with pull-up and release them */
gpio_mode_set(I2C_SCL_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, I2C_SCL_PIN);
gpio_mode_set(I2C_SDA_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, I2C_SDA_PIN);
gpio_output_options_set(I2C_SCL_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SCL_PIN);
gpio_output_options_set(I2C_SDA_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SDA_PIN);
gpio_bit_set(I2C_SCL_PORT, I2C_SCL_PIN); /* release SCL */
gpio_bit_set(I2C_SDA_PORT, I2C_SDA_PIN); /* release SDA */
/* 3. Double sample to confirm bus state */
delay_10us(1);
bool scl_value1 = gpio_input_bit_get(I2C_SCL_PORT, I2C_SCL_PIN);
bool sda_value1 = gpio_input_bit_get(I2C_SDA_PORT, I2C_SDA_PIN);
delay_10us(1);
bool scl_value2 = gpio_input_bit_get(I2C_SCL_PORT, I2C_SCL_PIN);
bool sda_value2 = gpio_input_bit_get(I2C_SDA_PORT, I2C_SDA_PIN);
/* 4. If SCL low -> stuck (cannot proceed) */
if (!scl_value2) {
/* Always restore the peripheral before returning to the caller. */
i2c_config();
return I2C_RECOVERY_SCL_STUCK_LOW;
}
/* 5. Fast path: bus idle */
if (scl_value1 && sda_value1 && scl_value2 && sda_value2) {
i2c_config();
return I2C_RECOVERY_OK;
}
/* 6. SDA low: attempt to free by generating up to I2C_RECOVERY_CLOCKS pulses */
if (scl_value2 && !sda_value2) {
bool sda_released = false;
for (uint8_t i = 0; i < I2C_RECOVERY_CLOCKS && !sda_released; i++) {
if (!i2c_generate_scl_pulse()) {
i2c_config();
return I2C_RECOVERY_SCL_STUCK_LOW; /* SCL failed to go high */
}
if (gpio_input_bit_get(I2C_SDA_PORT, I2C_SDA_PIN)) {
sda_released = true;
}
}
if (!sda_released) {
i2c_config();
return I2C_RECOVERY_SDA_STUCK_LOW;
}
/* 7. Generate a STOP condition to leave bus in idle state */
gpio_bit_reset(I2C_SDA_PORT, I2C_SDA_PIN); /* SDA low */
delay_10us(1);
gpio_bit_set(I2C_SCL_PORT, I2C_SCL_PIN); /* ensure SCL high */
delay_10us(1);
gpio_bit_set(I2C_SDA_PORT, I2C_SDA_PIN); /* SDA rising while SCL high -> STOP */
delay_10us(1);
}
/* 8. Reconfigure & enable peripheral */
i2c_config();
return I2C_RECOVERY_OK;
}
/**
* @brief 扫描I2C总线，查找连接的设备
*
* 该函数会扫描I2C总线上的所有地址（1到126），并尝试与每个地址进行通信。
* 如果在某个地址上发现了设备，则会打印出该设备的地址。
* 最后会打印出找到的设备总数。
*/
#if DEBUG_VERBOSE == CFG_ENABLE
void i2c_scan(void) {
uint8_t address;
int found_devices = 0;
// printf("Scanning I2C bus...\r\n");
const char* msg1 = "Scanning I2C bus...\r\n";
for (uint8_t i = 0; msg1[i] != '\0'; i++) {
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, msg1[i]);
}
while (usart_flag_get(UART_PHY, USART_FLAG_TC) == RESET) {}
for (address = 1; address < 127; address++) {
if (i2c_probe_ack(address)) {
// printf("Found device at 0x%02X\r\n", address);
const char* msg2_prefix = "Found device at 0x";
for (uint8_t i = 0; msg2_prefix[i] != '\0'; i++) {
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, msg2_prefix[i]);
}
// 发送地址的十六进制表示
uint8_t hex_chars[] = "0123456789ABCDEF";
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, hex_chars[(address >> 4) & 0x0F]);
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, hex_chars[address & 0x0F]);
const char* msg2_suffix = "\r\n";
for (uint8_t i = 0; msg2_suffix[i] != '\0'; i++) {
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, msg2_suffix[i]);
}
while (usart_flag_get(UART_PHY, USART_FLAG_TC) == RESET) {}
found_devices++;
}
}
if (found_devices == 0) {
// printf("No I2C devices found.\r\n");
const char* msg3 = "No I2C devices found.\r\n";
for (uint8_t i = 0; msg3[i] != '\0'; i++) {
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, msg3[i]);
}
while (usart_flag_get(UART_PHY, USART_FLAG_TC) == RESET) {}
} else {
// printf("Total %d I2C devices found.\r\n", found_devices);
const char* msg4_prefix = "Total ";
for (uint8_t i = 0; msg4_prefix[i] != '\0'; i++) {
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, msg4_prefix[i]);
}
// 发送设备数量
if (found_devices >= 10) {
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, '0' + (found_devices / 10));
}
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, '0' + (found_devices % 10));
const char* msg4_suffix = " I2C devices found.\r\n";
for (uint8_t i = 0; msg4_suffix[i] != '\0'; i++) {
while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
usart_data_transmit(UART_PHY, msg4_suffix[i]);
}
while (usart_flag_get(UART_PHY, USART_FLAG_TC) == RESET) {}
}
}
#endif
/**
* @brief 内部辅助函数：等待指定的I2C标志位被设置，带有超时。
* @param[in] flag: 要等待的I2C事件标志。
* @retval i2c_result_t: I2C_RESULT_SUCCESS 或 I2C_RESULT_TIMEOUT。
*/
static i2c_result_t _i2c_wait_flag_timeout(uint32_t flag)
{
uint16_t timeout = 0;
while(!i2c_flag_get(I2C0, flag)){
if(timeout++ > I2C_TIME_OUT){
#if DEBUG_VERBOSE == CFG_ENABLE
const char* fname = "UNKNOWN";
switch (flag) {
case I2C_FLAG_SBSEND: fname = "SBSEND"; break;
case I2C_FLAG_ADDSEND: fname = "ADDSEND"; break;
case I2C_FLAG_TBE: fname = "TBE"; break;
case I2C_FLAG_RBNE: fname = "RBNE"; break;
case I2C_FLAG_BTC: fname = "BTC"; break;
case I2C_FLAG_AERR: fname = "AERR"; break;
case I2C_FLAG_BERR: fname = "BERR"; break;
case I2C_FLAG_LOSTARB: fname = "LOSTARB"; break;
case I2C_FLAG_I2CBSY: fname = "I2CBSY"; break;
}
printf("I2C wait flag timeout: flag=0x%08X (%s)\r\n", (unsigned int)flag, fname);
#endif
return I2C_RESULT_TIMEOUT;
}
}
return I2C_RESULT_SUCCESS;
}
/**
* @brief 内部辅助函数：等待指定的I2C标志位被清除，带有超时。
* @param[in] flag: 要等待的I2C事件标志。
* @retval i2c_result_t: I2C_RESULT_SUCCESS 或 I2C_RESULT_TIMEOUT。
*/
static i2c_result_t _i2c_wait_flag_clear_timeout(uint32_t flag)
{
uint16_t timeout = 0;
while(i2c_flag_get(I2C0, flag)){
if(timeout++ > I2C_TIME_OUT){
return I2C_RESULT_TIMEOUT;
}
}
return I2C_RESULT_SUCCESS;
}
/******************************************************************************/
/* Common master transaction layer.
*
* Memory transactions are assembled from an optional 0/1/2-byte sub-address
* segment and a data segment:
* write: S | address+W | sub-address... | data... | P
* read: S | address+W | sub-address... | Sr | address+R | data | P
*
* All public register-width APIs use these primitives so ACK, NACK, STOP,
* timeout, and retry behavior stays consistent.
*/
#define I2C_MAX_SUBADDRESS_LENGTH 2U
typedef struct {
const uint8_t *buffer;
uint8_t length;
uint8_t index;
} i2c_tx_segment_t;
static bool i2c_tx_segment_next(i2c_tx_segment_t *segment, uint8_t *byte)
{
if (segment->index >= segment->length) {
return false;
}
*byte = segment->buffer[segment->index];
segment->index++;
return true;
}
/* Wait for STOP generation to complete (CTL0.STOP is cleared by hardware). */
static i2c_result_t i2c_wait_stop_done(void)
{
uint16_t timeout = 0U;
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
return (I2C_CTL0(I2C0) & I2C_CTL0_STOP) ?
I2C_RESULT_TIMEOUT : I2C_RESULT_SUCCESS;
}
/* Clear a possible late NACK and terminate the active transaction. */
static i2c_result_t i2c_abort_with_stop(void)
{
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
}
i2c_stop_on_bus(I2C0);
return i2c_wait_stop_done();
}
/* Preserve the transaction error unless STOP itself fails. */
static i2c_result_t i2c_abort_result(i2c_result_t result)
{
i2c_result_t stop_result = i2c_abort_with_stop();
return (stop_result == I2C_RESULT_SUCCESS) ? result : stop_result;
}
/* Wait for a transmit-side event while also observing the NACK flag. */
static i2c_result_t i2c_wait_flag_or_nack(uint32_t flag)
{
uint16_t timeout = 0U;
while ((!i2c_flag_get(I2C0, flag)) &&
(!i2c_flag_get(I2C0, I2C_FLAG_AERR)) &&
(timeout < I2C_TIME_OUT)) {
timeout++;
}
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
return I2C_RESULT_NACK;
}
return i2c_flag_get(I2C0, flag) ?
I2C_RESULT_SUCCESS : I2C_RESULT_TIMEOUT;
}
/*!
\brief perform one master transmit transaction
\param[in] slave_addr: 7-bit slave address
\param[in] first: first data segment, normally the sub-address
\param[in] second: second data segment, normally the payload
\param[in] send_stop: true to finish with STOP; false to keep the bus for
an immediately following repeated START
\retval i2c_result_t: operation result
*/
static i2c_result_t i2c_master_tx_once(uint8_t slave_addr,
i2c_tx_segment_t first,
i2c_tx_segment_t second,
bool send_stop)
{
uint8_t byte;
i2c_result_t result;
if (_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS) {
return I2C_RESULT_TIMEOUT;
}
i2c_start_on_bus(I2C0);
if (_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
return i2c_abort_result(I2C_RESULT_TIMEOUT);
}
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_TRANSMITTER);
result = i2c_wait_flag_or_nack(I2C_FLAG_ADDSEND);
if (result != I2C_RESULT_SUCCESS) {
return i2c_abort_result(result);
}
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
for (;;) {
if (!i2c_tx_segment_next(&first, &byte) &&
!i2c_tx_segment_next(&second, &byte)) {
break;
}
result = i2c_wait_flag_or_nack(I2C_FLAG_TBE);
if (result != I2C_RESULT_SUCCESS) {
return i2c_abort_result(result);
}
i2c_data_transmit(I2C0, byte);
}
/* BTC is required after the final byte; checking AERR here catches its NACK. */
result = i2c_wait_flag_or_nack(I2C_FLAG_BTC);
if (result != I2C_RESULT_SUCCESS) {
return i2c_abort_result(result);
}
if (!send_stop) {
return I2C_RESULT_SUCCESS;
}
i2c_stop_on_bus(I2C0);
return i2c_wait_stop_done();
}
/*!
\brief perform one master receive transaction
\param[in] slave_addr: 7-bit slave address
\param[out] data: receive buffer
\param[in] length: number of bytes to receive
\param[in] after_write_phase: true when the caller retained the bus after
writing a sub-address, so this START is a repeated START
\retval i2c_result_t: operation result
\note The N=1, N=2, and N>2 sequences follow the GD32E23x master
receiver procedure. ACKEN and ACKPOS are restored on every exit.
*/
static i2c_result_t i2c_master_rx_once(uint8_t slave_addr,
uint8_t *data,
uint8_t length,
bool after_write_phase)
{
uint8_t index = 0U;
bool transaction_active = after_write_phase;
bool stop_sent = false;
i2c_result_t result = I2C_RESULT_SUCCESS;
i2c_result_t stop_result;
/* Start each receive with a known ACK configuration. */
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
if (!after_write_phase &&
(_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS)) {
result = I2C_RESULT_TIMEOUT;
goto rx_restore;
}
/* The two-byte sequence requires ACKPOS_NEXT before START. */
if (length == 2U) {
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
}
i2c_start_on_bus(I2C0);
transaction_active = true;
if (_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
result = I2C_RESULT_TIMEOUT;
goto rx_finish;
}
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_RECEIVER);
result = i2c_wait_flag_or_nack(I2C_FLAG_ADDSEND);
if (result != I2C_RESULT_SUCCESS) {
goto rx_finish;
}
if (length <= 2U) {
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
}
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
if (length == 1U) {
i2c_stop_on_bus(I2C0);
stop_sent = true;
if (_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
result = I2C_RESULT_TIMEOUT;
goto rx_finish;
}
data[0] = i2c_data_receive(I2C0);
} else if (length == 2U) {
if (_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
result = I2C_RESULT_TIMEOUT;
goto rx_finish;
}
i2c_stop_on_bus(I2C0);
stop_sent = true;
data[0] = i2c_data_receive(I2C0);
data[1] = i2c_data_receive(I2C0);
} else {
while (index < length) {
if (index == (uint8_t)(length - 2U)) {
if (_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
result = I2C_RESULT_TIMEOUT;
goto rx_finish;
}
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
i2c_stop_on_bus(I2C0);
stop_sent = true;
data[index] = i2c_data_receive(I2C0);
index++;
} else {
if (_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
result = I2C_RESULT_TIMEOUT;
goto rx_finish;
}
data[index] = i2c_data_receive(I2C0);
index++;
}
}
}
rx_finish:
if (transaction_active) {
if (!stop_sent) {
stop_result = i2c_abort_with_stop();
} else {
stop_result = i2c_wait_stop_done();
}
if (stop_result != I2C_RESULT_SUCCESS) {
result = stop_result;
}
}
rx_restore:
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
return result;
}
static bool i2c_subaddress_is_valid(const uint8_t *subaddress,
uint8_t subaddress_length)
{
return (subaddress_length <= I2C_MAX_SUBADDRESS_LENGTH) &&
((subaddress_length == 0U) || (subaddress != NULL));
}
/*!
\brief write with an optional 0/1/2-byte sub-address
\param[in] subaddress: sub-address bytes in wire order, or NULL for none
\param[in] subaddress_length: number of sub-address bytes
*/
static i2c_result_t i2c_mem_write(uint8_t slave_addr,
const uint8_t *subaddress,
uint8_t subaddress_length,
const uint8_t *data,
uint8_t length)
{
i2c_tx_segment_t address_segment;
i2c_tx_segment_t data_segment;
uint8_t attempt;
if ((slave_addr > 0x7FU) ||
!i2c_subaddress_is_valid(subaddress, subaddress_length) ||
(data == NULL) ||
(length == 0U)) {
return I2C_RESULT_INVALID_PARAM;
}
address_segment.buffer = subaddress;
address_segment.length = subaddress_length;
data_segment.buffer = data;
data_segment.length = length;
for (attempt = 0U; attempt < I2C_MAX_RETRY; attempt++) {
i2c_result_t result;
address_segment.index = 0U;
data_segment.index = 0U;
result = i2c_master_tx_once(slave_addr,
address_segment,
data_segment,
true);
if ((result == I2C_RESULT_SUCCESS) ||
(result == I2C_RESULT_NACK)) {
return result;
}
(void)i2c_bus_reset();
delay_10us(10U);
}
return I2C_RESULT_ERROR;
}
/*!
\brief read with an optional 0/1/2-byte sub-address
\param[in] subaddress: sub-address bytes in wire order, or NULL for none
\param[in] subaddress_length: number of sub-address bytes
\param[in] restart_delay_ms: optional delay before the repeated START
*/
static i2c_result_t i2c_mem_read(uint8_t slave_addr,
const uint8_t *subaddress,
uint8_t subaddress_length,
uint8_t *data,
uint8_t length,
uint16_t restart_delay_ms)
{
i2c_tx_segment_t address_segment;
i2c_tx_segment_t empty_segment = {NULL, 0U, 0U};
uint8_t attempt;
if ((slave_addr > 0x7FU) ||
!i2c_subaddress_is_valid(subaddress, subaddress_length) ||
(data == NULL) ||
(length == 0U)) {
return I2C_RESULT_INVALID_PARAM;
}
address_segment.buffer = subaddress;
address_segment.length = subaddress_length;
for (attempt = 0U; attempt < I2C_MAX_RETRY; attempt++) {
i2c_result_t result;
if (subaddress_length != 0U) {
address_segment.index = 0U;
result = i2c_master_tx_once(slave_addr,
address_segment,
empty_segment,
false);
if (result == I2C_RESULT_NACK) {
return result;
}
if (result != I2C_RESULT_SUCCESS) {
(void)i2c_bus_reset();
delay_10us(10U);
continue;
}
if (restart_delay_ms != 0U) {
delay_ms(restart_delay_ms);
}
}
result = i2c_master_rx_once(slave_addr,
data,
length,
subaddress_length != 0U);
if ((result == I2C_RESULT_SUCCESS) ||
(result == I2C_RESULT_NACK)) {
return result;
}
(void)i2c_bus_reset();
delay_10us(10U);
}
return I2C_RESULT_ERROR;
}
i2c_result_t i2c_write_reg8(uint8_t slave_addr,
uint8_t reg_addr,
const uint8_t *data,
uint8_t length)
{
return i2c_mem_write(slave_addr, &reg_addr, 1U, data, length);
}
i2c_result_t i2c_read_reg8(uint8_t slave_addr,
uint8_t reg_addr,
uint8_t *data,
uint8_t length)
{
return i2c_mem_read(slave_addr,
&reg_addr,
1U,
data,
length,
I2C_READ_RESTART_DELAY_MS);
}
i2c_result_t i2c_write_reg16(uint8_t slave_addr,
uint16_t reg_addr,
const uint8_t *data,
uint8_t length)
{
const uint8_t subaddress[2] = {
(uint8_t)(reg_addr >> 8),
(uint8_t)reg_addr
};
return i2c_mem_write(slave_addr, subaddress, 2U, data, length);
}
i2c_result_t i2c_read_reg16(uint8_t slave_addr,
uint16_t reg_addr,
uint8_t *data,
uint8_t length)
{
const uint8_t subaddress[2] = {
(uint8_t)(reg_addr >> 8),
(uint8_t)reg_addr
};
return i2c_mem_read(slave_addr,
subaddress,
2U,
data,
length,
I2C_READ_RESTART_DELAY_MS);
}
/* Preserve the original template API: uint16_t register addresses are MSB first. */
i2c_result_t i2c_write(uint8_t slave_addr,
uint16_t reg_addr,
uint8_t *data,
uint8_t length)
{
return i2c_write_reg16(slave_addr, reg_addr, data, length);
}
i2c_result_t i2c_read(uint8_t slave_addr,
uint16_t reg_addr,
uint8_t *data,
uint8_t length)
{
return i2c_read_reg16(slave_addr, reg_addr, data, length);
}
/* Legacy names refer to a two-byte payload with an 8-bit register address. */
i2c_result_t i2c_write_16bits(uint8_t slave_addr,
uint8_t reg_addr,
uint8_t data[2])
{
return i2c_write_reg8(slave_addr, reg_addr, data, 2U);
}
i2c_result_t i2c_read_16bits(uint8_t slave_addr,
uint8_t reg_addr,
uint8_t *data)
{
return i2c_read_reg8(slave_addr, reg_addr, data, 2U);
}
i2c_result_t i2c_read_raw(uint8_t slave_addr,
uint8_t *data,
uint8_t length)
{
return i2c_mem_read(slave_addr, NULL, 0U, data, length, 0U);
}
bool i2c_probe_ack(uint8_t slave_addr)
{
bool acknowledged = false;
if (slave_addr > 0x7FU) {
return false;
}
if (_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS) {
return false;
}
i2c_start_on_bus(I2C0);
if (_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) == I2C_RESULT_SUCCESS) {
i2c_result_t result;
i2c_master_addressing(I2C0,
(slave_addr << 1),
I2C_TRANSMITTER);
result = i2c_wait_flag_or_nack(I2C_FLAG_ADDSEND);
if (result == I2C_RESULT_SUCCESS) {
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
acknowledged = true;
}
}
if (i2c_abort_with_stop() != I2C_RESULT_SUCCESS) {
(void)i2c_bus_reset();
acknowledged = false;
}
return acknowledged;
}
const char* i2c_get_status_string(i2c_result_t status)
{
switch (status) {
case I2C_RESULT_SUCCESS:
return "SUCCESS";
case I2C_RESULT_TIMEOUT:
return "TIMEOUT";
case I2C_RESULT_NACK:
return "NACK";
case I2C_RESULT_BUS_BUSY:
return "BUS_BUSY";
case I2C_RESULT_ERROR:
return "ERROR";
case I2C_RESULT_INVALID_PARAM:
return "INVALID_PARAM";
case I2C_RECOVERY_OK:
return "RECOVERY_OK";
case I2C_RECOVERY_SDA_STUCK_LOW:
return "RECOVERY_SDA_STUCK_LOW";
case I2C_RECOVERY_SCL_STUCK_LOW:
return "RECOVERY_SCL_STUCK_LOW";
default:
return "UNKNOWN";
}
}
Reference in New Issue View Git Blame Copy Permalink