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bfa311b70f
- uart_ring_buffer: PRIMASK 位检查从 ==0 改为 &0x1 修正 - i2c: 新增 i2c_read_raw() 无子地址读函数 - 全局: volatile 统一替换为 __IO (CMSIS 风格)
1296 lines
47 KiB
C
1296 lines
47 KiB
C
//
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// Created by dell on 24-12-20.
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//
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#include "i2c.h"
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/*!
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\brief configure the GPIO ports
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\param[in] none
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\param[out] none
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\retval none
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*/
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void i2c_gpio_config(void) {
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/* enable IIC GPIO clock */
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rcu_periph_clock_enable(RCU_GPIO_I2C);
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/* connect I2C_SCL_PIN to I2C_SCL */
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gpio_af_set(I2C_SCL_PORT, I2C_GPIO_AF, I2C_SCL_PIN);
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/* connect I2C_SDA_PIN to I2C_SDA */
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gpio_af_set(I2C_SDA_PORT, I2C_GPIO_AF, I2C_SDA_PIN);
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/* configure GPIO pins of I2C */
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gpio_mode_set(I2C_SCL_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, I2C_SCL_PIN);
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gpio_output_options_set(I2C_SCL_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SCL_PIN);
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gpio_mode_set(I2C_SDA_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, I2C_SDA_PIN);
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gpio_output_options_set(I2C_SDA_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SDA_PIN);
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}
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/*!
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\brief configure the I2CX interface
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\param[in] none
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\param[out] none
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\retval none
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*/
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i2c_result_t i2c_config(void) {
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/* configure I2C GPIO */
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i2c_gpio_config();
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/* enable I2C clock */
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rcu_periph_clock_enable(RCU_I2C);
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/* configure I2C clock */
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i2c_clock_config(I2C0, I2C_SPEED, I2C_DTCY_2);
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/* configure I2C address */
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i2c_mode_addr_config(I2C0, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, 0xA0);
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/* enable I2CX */
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i2c_enable(I2C0);
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/* enable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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return I2C_RESULT_SUCCESS;
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}
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/* wait for SCL to go high, return true if successful, false if timeout */
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static bool i2c_wait_scl_high(uint16_t max_wait_time) {
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while (max_wait_time--) {
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if (gpio_input_bit_get(I2C_SCL_PORT, I2C_SCL_PIN)) {
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return true;
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}
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delay_10us(1);
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}
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return false;
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}
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/* generate one manual SCL pulse; return true if SCL observed high (no stuck/overstretch) */
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static bool i2c_generate_scl_pulse(void) {
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GPIO_BC(I2C_SCL_PORT) = I2C_SCL_PIN; /* drive SCL low */
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delay_10us(1);
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GPIO_BOP(I2C_SCL_PORT) = I2C_SCL_PIN; /* release SCL (open-drain -> high via pull-up) */
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return i2c_wait_scl_high(200); /* wait up to ~2ms for clock stretching release */
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}
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/*!
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\brief reset I2C bus
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\param[in] none
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\param[out] none
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\retval none
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*/
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i2c_result_t i2c_bus_reset(void) {
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/* 1. Disable & deinit peripheral so pins can be fully controlled */
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i2c_disable(I2C0);
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i2c_deinit(I2C0);
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#ifdef DEBUG_VERBOSE
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printf("I2C bus reset\r\n");
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#endif
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/* 2. Configure SCL/SDA as GPIO open-drain outputs with pull-up and release them */
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gpio_mode_set(I2C_SCL_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, I2C_SCL_PIN);
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gpio_mode_set(I2C_SDA_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, I2C_SDA_PIN);
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gpio_output_options_set(I2C_SCL_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SCL_PIN);
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gpio_output_options_set(I2C_SDA_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SDA_PIN);
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gpio_bit_set(I2C_SCL_PORT, I2C_SCL_PIN); /* release SCL */
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gpio_bit_set(I2C_SDA_PORT, I2C_SDA_PIN); /* release SDA */
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/* 3. Double sample to confirm bus state */
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delay_10us(1);
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bool scl_value1 = gpio_input_bit_get(I2C_SCL_PORT, I2C_SCL_PIN);
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bool sda_value1 = gpio_input_bit_get(I2C_SDA_PORT, I2C_SDA_PIN);
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delay_10us(1);
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bool scl_value2 = gpio_input_bit_get(I2C_SCL_PORT, I2C_SCL_PIN);
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bool sda_value2 = gpio_input_bit_get(I2C_SDA_PORT, I2C_SDA_PIN);
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/* 4. If SCL low -> stuck (cannot proceed) */
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if (!scl_value2) {
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return I2C_RECOVERY_SCL_STUCK_LOW;
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}
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/* 5. Fast path: bus idle */
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if (scl_value1 && sda_value1 && scl_value2 && sda_value2) {
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i2c_config();
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return I2C_RECOVERY_OK;
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}
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/* 6. SDA low: attempt to free by generating up to I2C_RECOVERY_CLOCKS pulses */
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if (scl_value2 && !sda_value2) {
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bool sda_released = false;
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for (uint8_t i = 0; i < I2C_RECOVERY_CLOCKS && !sda_released; i++) {
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if (!i2c_generate_scl_pulse()) {
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return I2C_RECOVERY_SCL_STUCK_LOW; /* SCL failed to go high */
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}
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if (gpio_input_bit_get(I2C_SDA_PORT, I2C_SDA_PIN)) {
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sda_released = true;
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}
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}
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if (!sda_released) {
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return I2C_RECOVERY_SDA_STUCK_LOW;
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}
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/* 7. Generate a STOP condition to leave bus in idle state */
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gpio_bit_reset(I2C_SDA_PORT, I2C_SDA_PIN); /* SDA low */
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delay_10us(1);
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gpio_bit_set(I2C_SCL_PORT, I2C_SCL_PIN); /* ensure SCL high */
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delay_10us(1);
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gpio_bit_set(I2C_SDA_PORT, I2C_SDA_PIN); /* SDA rising while SCL high -> STOP */
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delay_10us(1);
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}
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/* 8. Reconfigure & enable peripheral */
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i2c_config();
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return I2C_RECOVERY_OK;
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}
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/**
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* @brief 扫描I2C总线，查找连接的设备
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*
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* 该函数会扫描I2C总线上的所有地址（1到126），并尝试与每个地址进行通信。
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* 如果在某个地址上发现了设备，则会打印出该设备的地址。
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* 最后会打印出找到的设备总数。
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*/
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void i2c_scan(void) {
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uint32_t timeout;
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uint8_t address;
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int found_devices = 0;
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// printf("Scanning I2C bus...\r\n");
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const char* msg1 = "Scanning I2C bus...\r\n";
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for (uint8_t i = 0; msg1[i] != '\0'; i++) {
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, msg1[i]);
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}
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while (usart_flag_get(UART_PHY, USART_FLAG_TC) == RESET) {}
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for (address = 1; address < 127; address++) {
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timeout = 0;
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// 生成起始条件
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT))
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timeout++;
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if (timeout >= I2C_TIME_OUT) {
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continue; // 超时，跳过该地址
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}
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i2c_start_on_bus(I2C0);
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timeout = 0;
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// 等待起始条件发送完成
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while (!i2c_flag_get(I2C0, I2C_FLAG_SBSEND) && (timeout < I2C_TIME_OUT))
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timeout++;
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if (timeout >= I2C_TIME_OUT) {
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continue; // 超时，跳过该地址
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}
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i2c_master_addressing(I2C0, (address << 1), I2C_TRANSMITTER);
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timeout = 0;
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// 等待地址发送完成或错误
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while (!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND) && !i2c_flag_get(I2C0, I2C_FLAG_AERR) && (timeout < I2C_TIME_OUT))
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timeout++;
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if (timeout < I2C_TIME_OUT && i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) {
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// 设备响应 - 清除地址标志
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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// printf("Found device at 0x%02X\r\n", address);
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const char* msg2_prefix = "Found device at 0x";
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for (uint8_t i = 0; msg2_prefix[i] != '\0'; i++) {
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, msg2_prefix[i]);
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}
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// 发送地址的十六进制表示
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uint8_t hex_chars[] = "0123456789ABCDEF";
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, hex_chars[(address >> 4) & 0x0F]);
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, hex_chars[address & 0x0F]);
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const char* msg2_suffix = "\r\n";
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for (uint8_t i = 0; msg2_suffix[i] != '\0'; i++) {
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, msg2_suffix[i]);
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}
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while (usart_flag_get(UART_PHY, USART_FLAG_TC) == RESET) {}
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found_devices++;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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// 设备无响应 - 清除错误标志
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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}
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// 生成停止条件
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i2c_stop_on_bus(I2C0);
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timeout = 0;
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while (i2c_flag_get(I2C0, I2C_FLAG_STPDET) && (timeout < I2C_TIME_OUT))
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timeout++;
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}
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if (found_devices == 0) {
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// printf("No I2C devices found.\r\n");
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const char* msg3 = "No I2C devices found.\r\n";
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for (uint8_t i = 0; msg3[i] != '\0'; i++) {
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, msg3[i]);
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}
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while (usart_flag_get(UART_PHY, USART_FLAG_TC) == RESET) {}
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} else {
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// printf("Total %d I2C devices found.\r\n", found_devices);
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const char* msg4_prefix = "Total ";
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for (uint8_t i = 0; msg4_prefix[i] != '\0'; i++) {
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, msg4_prefix[i]);
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}
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// 发送设备数量
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if (found_devices >= 10) {
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, '0' + (found_devices / 10));
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}
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, '0' + (found_devices % 10));
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const char* msg4_suffix = " I2C devices found.\r\n";
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for (uint8_t i = 0; msg4_suffix[i] != '\0'; i++) {
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while (usart_flag_get(UART_PHY, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(UART_PHY, msg4_suffix[i]);
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}
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while (usart_flag_get(UART_PHY, USART_FLAG_TC) == RESET) {}
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}
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}
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/**
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* @brief 内部辅助函数：等待指定的I2C标志位被设置，带有超时。
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* @param[in] flag: 要等待的I2C事件标志。
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* @retval i2c_result_t: I2C_RESULT_SUCCESS 或 I2C_RESULT_TIMEOUT。
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*/
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static i2c_result_t _i2c_wait_flag_timeout(uint32_t flag)
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{
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uint16_t timeout = 0;
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while(!i2c_flag_get(I2C0, flag)){
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if(timeout++ > I2C_TIME_OUT){
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#ifdef DEBUG_VERBOSE
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const char* fname = "UNKNOWN";
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switch (flag) {
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case I2C_FLAG_SBSEND: fname = "SBSEND"; break;
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case I2C_FLAG_ADDSEND: fname = "ADDSEND"; break;
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case I2C_FLAG_TBE: fname = "TBE"; break;
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case I2C_FLAG_RBNE: fname = "RBNE"; break;
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case I2C_FLAG_BTC: fname = "BTC"; break;
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case I2C_FLAG_AERR: fname = "AERR"; break;
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case I2C_FLAG_BERR: fname = "BERR"; break;
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case I2C_FLAG_LOSTARB: fname = "LOSTARB"; break;
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case I2C_FLAG_I2CBSY: fname = "I2CBSY"; break;
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}
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printf("I2C wait flag timeout: flag=0x%08X (%s)\r\n", (unsigned int)flag, fname);
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#endif
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return I2C_RESULT_TIMEOUT;
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}
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}
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return I2C_RESULT_SUCCESS;
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}
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/**
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* @brief 内部辅助函数：等待指定的I2C标志位被清除，带有超时。
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* @param[in] flag: 要等待的I2C事件标志。
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* @retval i2c_result_t: I2C_RESULT_SUCCESS 或 I2C_RESULT_TIMEOUT。
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*/
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static i2c_result_t _i2c_wait_flag_clear_timeout(uint32_t flag)
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{
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uint16_t timeout = 0;
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while(i2c_flag_get(I2C0, flag)){
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if(timeout++ > I2C_TIME_OUT){
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return I2C_RESULT_TIMEOUT;
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}
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}
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return I2C_RESULT_SUCCESS;
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}
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i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]) {
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i2c_state_t state = I2C_STATE_START;
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uint16_t timeout = 0;
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uint8_t retry_count = 0;
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/* parameter validation */
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if (data == NULL || slave_addr > 0x7F) {
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return I2C_RESULT_INVALID_PARAM;
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}
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while (retry_count < I2C_MAX_RETRY) {
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switch (state) {
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case I2C_STATE_START:
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timeout = 0;
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/* wait for bus to be idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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i2c_start_on_bus(I2C0);
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timeout = 0;
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state = I2C_STATE_SEND_ADDRESS;
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break;
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case I2C_STATE_SEND_ADDRESS:
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/* wait for start condition to be sent. SBSEND flag */
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while((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* send slave address */
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i2c_master_addressing(I2C0, slave_addr << 1, I2C_TRANSMITTER);
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timeout = 0;
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state = I2C_STATE_CLEAR_ADDRESS;
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break;
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case I2C_STATE_CLEAR_ADDRESS:
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/* wait for address to be acknowledged.ADDSEND set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (!i2c_flag_get(I2C0, I2C_FLAG_AERR)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))
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{
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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timeout =0;
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state = I2C_STATE_TRANSMIT_REG;
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break;
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} else {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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timeout =0;
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#ifdef DEBUG_VERBOSE
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printf("IIC write failed for Error Slave Address. \n");
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#endif
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return I2C_RESULT_NACK;
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}
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case I2C_STATE_TRANSMIT_REG:
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/* wait until the transmit data buffer is empty */
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if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* send register address */
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i2c_data_transmit(I2C0, reg_addr);
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state = I2C_STATE_TRANSMIT_DATA;
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break;
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case I2C_STATE_TRANSMIT_DATA:
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/* wait until the transmit data buffer is empty */
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if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* send register MSB value */
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i2c_data_transmit(I2C0, data[0]);
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/* wait until the transmit data buffer is empty */
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if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
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state = I2C_STATE_ERROR;
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break;
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}
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_stop_on_bus(I2C0);
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return I2C_RESULT_NACK;
|
|
} else if (i2c_flag_get(I2C0, I2C_FLAG_BERR) || i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
|
|
// 可按需清标志
|
|
i2c_stop_on_bus(I2C0);
|
|
return I2C_RESULT_ERROR;
|
|
}
|
|
|
|
/* send register LSB value */
|
|
i2c_data_transmit(I2C0, data[1]);
|
|
|
|
/* wait until BTC bit is set */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
state = I2C_STATE_STOP;
|
|
break;
|
|
|
|
case I2C_STATE_STOP:
|
|
/* send a stop condition to I2C bus */
|
|
i2c_stop_on_bus(I2C0);
|
|
|
|
timeout = 0;
|
|
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* i2c master sends STOP signal successfully */
|
|
/* success */
|
|
return I2C_RESULT_SUCCESS;
|
|
|
|
case I2C_STATE_ERROR:
|
|
/* I2C bus error, try to reset the bus and retry */
|
|
i2c_bus_reset();
|
|
|
|
retry_count ++;
|
|
if (retry_count >= I2C_MAX_RETRY)
|
|
{
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("IIC write failed after %d retries\n", I2C_MAX_RETRY);
|
|
#endif
|
|
return I2C_RESULT_ERROR;
|
|
}
|
|
|
|
/* reset state machine for retry */
|
|
state = I2C_STATE_START;
|
|
timeout = 0;
|
|
|
|
/* small delay before retry */
|
|
delay_10us(10);
|
|
break;
|
|
|
|
default:
|
|
state = I2C_STATE_START;
|
|
break;
|
|
}
|
|
}
|
|
return I2C_RESULT_TIMEOUT;
|
|
}
|
|
|
|
i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data) {
|
|
i2c_state_t state = I2C_STATE_START;
|
|
uint16_t timeout = 0;
|
|
uint8_t retry_count = 0;
|
|
bool write_phase = true;
|
|
|
|
// 参数检查：防止空指针和非法地址
|
|
if (data == NULL || slave_addr > 0x7F) {
|
|
return I2C_RESULT_INVALID_PARAM;
|
|
}
|
|
|
|
/* enable acknowledge */
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
|
|
while (retry_count < (uint8_t)I2C_MAX_RETRY) {
|
|
switch (state) {
|
|
case I2C_STATE_START:
|
|
timeout = 0;
|
|
|
|
/* wait for bus to be idle */
|
|
if(_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
// send start condition
|
|
i2c_start_on_bus(I2C0);
|
|
state = I2C_STATE_SEND_ADDRESS;
|
|
break;
|
|
|
|
case I2C_STATE_SEND_ADDRESS:
|
|
/* wait for start condition to be sent */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
// send slave address
|
|
if (write_phase) {
|
|
/* write phase: send address with write bit */
|
|
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_TRANSMITTER);
|
|
} else {
|
|
/* read phase: send address with read bit */
|
|
i2c_master_addressing(I2C0, (slave_addr << 1) | 0x01, I2C_RECEIVER);
|
|
}
|
|
|
|
state = I2C_STATE_CLEAR_ADDRESS;
|
|
timeout = 0;
|
|
break;
|
|
|
|
case I2C_STATE_CLEAR_ADDRESS:
|
|
/* wait for address to be acknowledged */
|
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
if (write_phase) {
|
|
/* clear address flag (write phase) */
|
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
|
state = I2C_STATE_TRANSMIT_DATA;
|
|
} else {
|
|
/* READ phase for 2 bytes: set POS=NEXT and disable ACK BEFORE clearing ADDR */
|
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
|
|
|
/* now clear address flag to release SCL and enter data phase */
|
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
|
|
|
state = I2C_STATE_RECEIVE_DATA;
|
|
}
|
|
|
|
timeout = 0;
|
|
break;
|
|
|
|
case I2C_STATE_TRANSMIT_DATA:
|
|
/* wait for transmit buffer to be empty */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send register address */
|
|
i2c_data_transmit(I2C0, reg_addr);
|
|
state = I2C_STATE_RESTART;
|
|
break;
|
|
|
|
case I2C_STATE_RESTART:
|
|
/* wait for byte transfer complete BTC: Bit Transfer Complete */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* generate repeated start condition */
|
|
i2c_start_on_bus(I2C0);
|
|
|
|
/* wait for repeated start condition to be sent */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send slave address with read bit (R/W bit is set by library) */
|
|
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_RECEIVER);
|
|
|
|
/* switch to read phase */
|
|
write_phase = false;
|
|
state = I2C_STATE_CLEAR_ADDRESS;
|
|
timeout = 0;
|
|
break;
|
|
|
|
case I2C_STATE_RECEIVE_DATA:
|
|
/* Wait for BTC (both bytes received) */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* Send STOP before reading the last two bytes */
|
|
i2c_stop_on_bus(I2C0);
|
|
|
|
/* Read the two bytes back-to-back */
|
|
data[0] = i2c_data_receive(I2C0);
|
|
data[1] = i2c_data_receive(I2C0);
|
|
|
|
state = I2C_STATE_STOP;
|
|
break;
|
|
|
|
case I2C_STATE_STOP:
|
|
/* wait for stop condition to complete */
|
|
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* i2c master sends STOP signal successfully */
|
|
/* success */
|
|
return I2C_RESULT_SUCCESS;
|
|
|
|
case I2C_STATE_ERROR:
|
|
/* I2C bus error, try to reset the bus and retry */
|
|
i2c_bus_reset();
|
|
|
|
retry_count++;
|
|
if (retry_count >= I2C_MAX_RETRY) {
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("IIC read failed after %d retries\n", I2C_MAX_RETRY);
|
|
#endif
|
|
return I2C_RESULT_ERROR;
|
|
}
|
|
|
|
/* reset state machine for retry */
|
|
state = I2C_STATE_START;
|
|
write_phase = true;
|
|
timeout = 0;
|
|
|
|
/* small delay before retry */
|
|
delay_10us(10);
|
|
break;
|
|
|
|
default:
|
|
state = I2C_STATE_START;
|
|
break;
|
|
}
|
|
}
|
|
return I2C_RESULT_TIMEOUT;
|
|
}
|
|
|
|
/*!
|
|
\brief write data to I2C device with configurable length
|
|
\param[in] slave_addr: slave device address (7-bit)
|
|
\param[in] reg_addr: register address
|
|
\param[in] data: pointer to data buffer
|
|
\param[in] length: number of bytes to write (1-255)
|
|
\param[out] none
|
|
\retval i2c_result_t: operation result
|
|
*/
|
|
i2c_result_t i2c_write(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t length) {
|
|
i2c_state_t state = I2C_STATE_START;
|
|
uint16_t timeout = 0;
|
|
uint8_t retry_count = 0;
|
|
uint8_t data_index = 0;
|
|
|
|
/* parameter validation */
|
|
if (data == NULL || slave_addr > 0x7F || length == 0) {
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C read invalid param: slave=0x%02X, len=%u, data=%p\r\n", slave_addr, length, data);
|
|
#endif
|
|
return I2C_RESULT_INVALID_PARAM;
|
|
}
|
|
|
|
while (retry_count < I2C_MAX_RETRY) {
|
|
switch (state) {
|
|
case I2C_STATE_START:
|
|
timeout = 0;
|
|
data_index = 0;
|
|
|
|
/* wait for bus to be idle */
|
|
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
i2c_start_on_bus(I2C0);
|
|
timeout = 0;
|
|
state = I2C_STATE_SEND_ADDRESS;
|
|
break;
|
|
|
|
case I2C_STATE_SEND_ADDRESS:
|
|
/* wait for start condition to be sent. SBSEND flag */
|
|
while((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send slave address */
|
|
i2c_master_addressing(I2C0, slave_addr << 1, I2C_TRANSMITTER);
|
|
timeout = 0;
|
|
state = I2C_STATE_CLEAR_ADDRESS;
|
|
break;
|
|
|
|
case I2C_STATE_CLEAR_ADDRESS:
|
|
/* wait for address to be acknowledged.ADDSEND set means i2c slave sends ACK */
|
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (!i2c_flag_get(I2C0, I2C_FLAG_AERR)) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
} else if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) {
|
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
|
timeout = 0;
|
|
state = I2C_STATE_TRANSMIT_REG;
|
|
break;
|
|
} else {
|
|
/* NACK received - address not acknowledged */
|
|
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
|
i2c_stop_on_bus(I2C0);
|
|
timeout = 0;
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C write failed for Error Slave Address. \n");
|
|
#endif
|
|
return I2C_RESULT_NACK;
|
|
}
|
|
|
|
case I2C_STATE_TRANSMIT_REG:
|
|
/* wait until the transmit data buffer is empty */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send register address */
|
|
i2c_data_transmit(I2C0, reg_addr);
|
|
state = I2C_STATE_TRANSMIT_DATA;
|
|
break;
|
|
|
|
case I2C_STATE_TRANSMIT_DATA:
|
|
/* wait until the transmit data buffer is empty */
|
|
while (data_index < length) {
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send data byte */
|
|
i2c_data_transmit(I2C0, data[data_index]);
|
|
data_index++;
|
|
|
|
/* check for errors */
|
|
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
|
i2c_stop_on_bus(I2C0);
|
|
return I2C_RESULT_NACK;
|
|
} else if (i2c_flag_get(I2C0, I2C_FLAG_BERR) || i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
|
|
i2c_stop_on_bus(I2C0);
|
|
return I2C_RESULT_ERROR;
|
|
}
|
|
}
|
|
if(state == I2C_STATE_ERROR) break;
|
|
|
|
|
|
/* check if all data has been sent */
|
|
if (data_index >= length) {
|
|
/* wait until BTC bit is set for last byte */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
state = I2C_STATE_STOP;
|
|
}
|
|
break;
|
|
|
|
case I2C_STATE_STOP:
|
|
/* send a stop condition to I2C bus */
|
|
i2c_stop_on_bus(I2C0);
|
|
|
|
timeout = 0;
|
|
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* success */
|
|
return I2C_RESULT_SUCCESS;
|
|
|
|
case I2C_STATE_ERROR:
|
|
/* I2C bus error, try to reset the bus and retry */
|
|
i2c_bus_reset();
|
|
|
|
retry_count++;
|
|
if (retry_count >= I2C_MAX_RETRY) {
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("IIC write failed after %d retries\n", I2C_MAX_RETRY);
|
|
#endif
|
|
return I2C_RESULT_ERROR;
|
|
}
|
|
|
|
/* reset state machine for retry */
|
|
state = I2C_STATE_START;
|
|
timeout = 0;
|
|
|
|
/* small delay before retry */
|
|
delay_10us(10);
|
|
break;
|
|
|
|
default:
|
|
state = I2C_STATE_START;
|
|
break;
|
|
}
|
|
}
|
|
return I2C_RESULT_TIMEOUT;
|
|
}
|
|
|
|
/*!
|
|
\brief read data from I2C device with configurable length
|
|
\param[in] slave_addr: slave device address (7-bit)
|
|
\param[in] reg_addr: register address
|
|
\param[out] data: pointer to data buffer
|
|
\param[in] length: number of bytes to read (1-255)
|
|
\retval i2c_result_t: operation result
|
|
*/
|
|
i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t length) {
|
|
i2c_state_t state = I2C_STATE_START;
|
|
uint16_t timeout = 0;
|
|
uint8_t retry_count = 0;
|
|
bool write_phase = true;
|
|
uint8_t data_index = 0;
|
|
|
|
/* parameter validation */
|
|
if (data == NULL || slave_addr > 0x7F || length == 0) {
|
|
return I2C_RESULT_INVALID_PARAM;
|
|
}
|
|
|
|
/* enable acknowledge */
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C read start: slave=0x%02X reg=0x%02X len=%u\r\n", slave_addr, reg_addr, length);
|
|
#endif
|
|
|
|
while (retry_count < (uint8_t)I2C_MAX_RETRY) {
|
|
switch (state) {
|
|
case I2C_STATE_START:
|
|
timeout = 0;
|
|
data_index = 0;
|
|
|
|
/* wait for bus to be idle */
|
|
if(_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send start condition */
|
|
i2c_start_on_bus(I2C0);
|
|
state = I2C_STATE_SEND_ADDRESS;
|
|
break;
|
|
|
|
case I2C_STATE_SEND_ADDRESS:
|
|
/* wait for start condition to be sent */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send slave address */
|
|
if (write_phase) {
|
|
/* write phase: send address with write bit */
|
|
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_TRANSMITTER);
|
|
} else {
|
|
/* read phase: send address with read bit */
|
|
i2c_master_addressing(I2C0, (slave_addr << 1) | 0x01, I2C_RECEIVER);
|
|
}
|
|
|
|
state = I2C_STATE_CLEAR_ADDRESS;
|
|
timeout = 0;
|
|
break;
|
|
|
|
case I2C_STATE_CLEAR_ADDRESS:
|
|
/* wait for address to be acknowledged */
|
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* debug: show address ack and error flags */
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C CLEAR_ADDRESS: write_phase=%d ADDSEND=%d AERR=%d\r\n",
|
|
(int)write_phase,
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_ADDSEND),
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_AERR));
|
|
#endif
|
|
|
|
if (write_phase) {
|
|
/* clear address flag (write phase) */
|
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
|
state = I2C_STATE_TRANSMIT_DATA;
|
|
} else {
|
|
/* READ phase: handle ACK/ACKPOS based on requested length
|
|
- length == 1: disable ACK before clearing ADDR
|
|
- length == 2: set ACKPOS_NEXT and disable ACK before clearing ADDR
|
|
- length > 2: keep ACK enabled and clear ADDR; we'll handle N-2/BTF sequence later */
|
|
if (length == 1) {
|
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C READ phase: length=1, disabling ACK before clearing ADDSEND\r\n");
|
|
#endif
|
|
} else if (length == 2) {
|
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C READ phase: length=2, set ACKPOS_NEXT and disabling ACK before clearing ADDSEND\r\n");
|
|
#endif
|
|
} else {
|
|
/* length > 2: keep ACK enabled so slave will clock out data */
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C READ phase: length=%u (>2), keeping ACK enabled\r\n", length);
|
|
#endif
|
|
}
|
|
|
|
/* now clear address flag to release SCL and enter data phase */
|
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
|
|
|
state = I2C_STATE_RECEIVE_DATA;
|
|
}
|
|
|
|
timeout = 0;
|
|
break;
|
|
|
|
case I2C_STATE_TRANSMIT_DATA:
|
|
/* wait for transmit buffer to be empty */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send register address */
|
|
i2c_data_transmit(I2C0, reg_addr);
|
|
state = I2C_STATE_RESTART;
|
|
break;
|
|
|
|
case I2C_STATE_RESTART:
|
|
/* wait for byte transfer complete */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C RESTART: after BTC, delay 5ms and issuing repeated START\r\n");
|
|
#endif
|
|
/* small delay to allow slave device to prepare multi-byte data before repeated start */
|
|
/* increased to 5ms to improve reliability for DLPC multi-byte reads */
|
|
delay_ms(5);
|
|
|
|
/* generate repeated start condition */
|
|
i2c_start_on_bus(I2C0);
|
|
|
|
/* wait for repeated start condition to be sent */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* send slave address with read bit */
|
|
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_RECEIVER);
|
|
|
|
/* switch to read phase */
|
|
write_phase = false;
|
|
state = I2C_STATE_CLEAR_ADDRESS;
|
|
timeout = 0;
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C addressing sent for read (slave=0x%02X)\r\n", slave_addr);
|
|
#endif
|
|
break;
|
|
|
|
case I2C_STATE_RECEIVE_DATA:
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C RECEIVE_DATA: expecting %u bytes\r\n", length);
|
|
#endif
|
|
if (length == 1) {
|
|
/* single byte read */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
data[0] = i2c_data_receive(I2C0);
|
|
state = I2C_STATE_STOP;
|
|
} else if (length == 2) {
|
|
/* two bytes read */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
/* send STOP before reading the last two bytes */
|
|
i2c_stop_on_bus(I2C0);
|
|
/* read the two bytes back-to-back */
|
|
data[0] = i2c_data_receive(I2C0);
|
|
data[1] = i2c_data_receive(I2C0);
|
|
state = I2C_STATE_STOP;
|
|
} else {
|
|
/* multi-byte read (length > 2) */
|
|
while (data_index < length) {
|
|
if (data_index < length - 2) {
|
|
/* normal bytes: wait for RBNE and read with ACK */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
data[data_index] = i2c_data_receive(I2C0);
|
|
data_index++;
|
|
} else if (data_index == length - 2) {
|
|
/* second to last byte: wait for BTF, then disable ACK and read */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
/* disable ACK before reading N-1 byte */
|
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
|
/* send STOP before reading N-1 byte */
|
|
i2c_stop_on_bus(I2C0);
|
|
/* read N-1 byte */
|
|
data[data_index] = i2c_data_receive(I2C0);
|
|
data_index++;
|
|
} else {
|
|
/* last byte: wait for RBNE and read */
|
|
if(_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
/* read last byte */
|
|
data[data_index] = i2c_data_receive(I2C0);
|
|
data_index++;
|
|
}
|
|
}
|
|
if(state == I2C_STATE_ERROR) break;
|
|
state = I2C_STATE_STOP;
|
|
}
|
|
break;
|
|
|
|
case I2C_STATE_STOP:
|
|
/* wait for stop condition to complete */
|
|
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
/* reset ACK configuration for next operation */
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
|
|
|
|
/* success */
|
|
return I2C_RESULT_SUCCESS;
|
|
|
|
case I2C_STATE_ERROR:
|
|
/* I2C bus error, try to reset the bus and retry */
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C_STATE_ERROR: resetting bus and retrying (retry_count=%u)\r\n", retry_count);
|
|
#endif
|
|
i2c_bus_reset();
|
|
|
|
/* reset ACK configuration */
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
|
|
|
|
retry_count++;
|
|
if (retry_count >= I2C_MAX_RETRY) {
|
|
#ifdef DEBUG_VERBOSE
|
|
/* Print diagnostic flags to help root-cause analysis */
|
|
printf("I2C read final failure after %d retries, last_state=%d\r\n", I2C_MAX_RETRY, state);
|
|
printf(" FLAGS: AERR=%d BERR=%d LOSTARB=%d I2CBSY=%d\r\n",
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_AERR),
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_BERR),
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_LOSTARB),
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_I2CBSY));
|
|
#endif
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C read failed after %d retries\n", I2C_MAX_RETRY);
|
|
#endif
|
|
return I2C_RESULT_ERROR;
|
|
}
|
|
|
|
/* reset state machine for retry */
|
|
state = I2C_STATE_START;
|
|
write_phase = true;
|
|
timeout = 0;
|
|
|
|
/* small delay before retry */
|
|
delay_10us(10);
|
|
break;
|
|
|
|
default:
|
|
state = I2C_STATE_START;
|
|
break;
|
|
}
|
|
}
|
|
/* timeout path: provide debug info */
|
|
#ifdef DEBUG_VERBOSE
|
|
printf("I2C read timeout (end state). slave=0x%02X, len=%u\r\n", slave_addr, length);
|
|
printf(" FLAGS: AERR=%d BERR=%d LOSTARB=%d I2CBSY=%d\r\n",
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_AERR),
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_BERR),
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_LOSTARB),
|
|
(int)i2c_flag_get(I2C0, I2C_FLAG_I2CBSY));
|
|
#endif
|
|
return I2C_RESULT_TIMEOUT;
|
|
}
|
|
|
|
/*!
|
|
\brief read data from I2C device without register/sub-address phase
|
|
\param[in] slave_addr: slave device address (7-bit)
|
|
\param[out] data: pointer to data buffer
|
|
\param[in] length: number of bytes to read (1-255)
|
|
\retval i2c_result_t: operation result
|
|
*/
|
|
i2c_result_t i2c_read_raw(uint8_t slave_addr, uint8_t *data, uint8_t length)
|
|
{
|
|
i2c_state_t state = I2C_STATE_START;
|
|
uint16_t timeout = 0;
|
|
uint8_t retry_count = 0;
|
|
uint8_t data_index = 0;
|
|
|
|
if (data == NULL || slave_addr > 0x7F || length == 0) {
|
|
return I2C_RESULT_INVALID_PARAM;
|
|
}
|
|
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
|
|
while (retry_count < (uint8_t)I2C_MAX_RETRY) {
|
|
switch (state) {
|
|
case I2C_STATE_START:
|
|
timeout = 0;
|
|
data_index = 0;
|
|
|
|
if (_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
i2c_start_on_bus(I2C0);
|
|
state = I2C_STATE_SEND_ADDRESS;
|
|
break;
|
|
|
|
case I2C_STATE_SEND_ADDRESS:
|
|
if (_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_RECEIVER);
|
|
state = I2C_STATE_CLEAR_ADDRESS;
|
|
timeout = 0;
|
|
break;
|
|
|
|
case I2C_STATE_CLEAR_ADDRESS:
|
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (!i2c_flag_get(I2C0, I2C_FLAG_AERR)) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
|
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
|
i2c_stop_on_bus(I2C0);
|
|
return I2C_RESULT_NACK;
|
|
}
|
|
|
|
if (length == 1) {
|
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
|
} else if (length == 2) {
|
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
|
} else {
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
}
|
|
|
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
|
state = I2C_STATE_RECEIVE_DATA;
|
|
timeout = 0;
|
|
break;
|
|
|
|
case I2C_STATE_RECEIVE_DATA:
|
|
if (length == 1) {
|
|
if (_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
data[0] = i2c_data_receive(I2C0);
|
|
state = I2C_STATE_STOP;
|
|
} else if (length == 2) {
|
|
if (_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
i2c_stop_on_bus(I2C0);
|
|
data[0] = i2c_data_receive(I2C0);
|
|
data[1] = i2c_data_receive(I2C0);
|
|
state = I2C_STATE_STOP;
|
|
} else {
|
|
while (data_index < length) {
|
|
if (data_index < length - 2) {
|
|
if (_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
data[data_index++] = i2c_data_receive(I2C0);
|
|
} else if (data_index == length - 2) {
|
|
if (_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
|
i2c_stop_on_bus(I2C0);
|
|
data[data_index++] = i2c_data_receive(I2C0);
|
|
} else {
|
|
if (_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
data[data_index++] = i2c_data_receive(I2C0);
|
|
}
|
|
}
|
|
if (state == I2C_STATE_ERROR) break;
|
|
state = I2C_STATE_STOP;
|
|
}
|
|
break;
|
|
|
|
case I2C_STATE_STOP:
|
|
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
|
timeout++;
|
|
}
|
|
if (timeout >= I2C_TIME_OUT) {
|
|
state = I2C_STATE_ERROR;
|
|
break;
|
|
}
|
|
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
|
|
return I2C_RESULT_SUCCESS;
|
|
|
|
case I2C_STATE_ERROR:
|
|
i2c_bus_reset();
|
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
|
|
|
|
retry_count++;
|
|
if (retry_count >= I2C_MAX_RETRY) {
|
|
return I2C_RESULT_ERROR;
|
|
}
|
|
|
|
state = I2C_STATE_START;
|
|
timeout = 0;
|
|
delay_10us(10);
|
|
break;
|
|
|
|
default:
|
|
state = I2C_STATE_START;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return I2C_RESULT_TIMEOUT;
|
|
}
|
|
|
|
#ifdef DEBUG_VERBOSE
|
|
/*!
|
|
\brief get status string for debugging
|
|
\param[in] status: i2c_status_t value
|
|
\param[out] none
|
|
\retval const char* status string
|
|
*/
|
|
const char* i2c_get_status_string(i2c_result_t status) {
|
|
switch (status) {
|
|
case I2C_RESULT_SUCCESS:
|
|
return "SUCCESS";
|
|
case I2C_RESULT_TIMEOUT:
|
|
return "TIMEOUT";
|
|
case I2C_RESULT_NACK:
|
|
return "NACK";
|
|
case I2C_RESULT_BUS_BUSY:
|
|
return "BUS_BUSY";
|
|
case I2C_RESULT_ERROR:
|
|
return "ERROR";
|
|
case I2C_RESULT_INVALID_PARAM:
|
|
return "INVALID_PARAM";
|
|
default:
|
|
return "UNKNOWN";
|
|
}
|
|
}
|
|
#endif
|