refactor: 同步 actuator 项目的 RS485 支持和 ENABLE→CFG_ENABLE 重命名

- board_config.h: ENABLE/DISABLE 重命名为 CFG_ENABLE/CFG_DISABLE
- board_config.h: 新增 RS485_MODE 配置块(默认 CFG_DISABLE)
- uart.c: 新增 RS485 DE 引脚 AF 配置和硬件 485 模式配置
- 所有源文件: == ENABLE → == CFG_ENABLE(共 34 处)
- 兼容: RS485 默认关闭,零影响现有项目
This commit is contained in:
2026-07-28 15:20:06 +00:00
parent a48e6b8ba6
commit 01dc6f85d7
7 changed files with 65 additions and 40 deletions
+15
View File
@@ -17,6 +17,14 @@ void uart_init(void) {
gpio_mode_set(UART_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, UART_TX_PIN | UART_RX_PIN);
gpio_output_options_set(UART_GPIO_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, UART_TX_PIN | UART_RX_PIN);
#if RS485_MODE == CFG_ENABLE
/* 配置 RS485 DE 引脚 */
rcu_periph_clock_enable(RS485_DE_RCU);
gpio_af_set(RS485_DE_PORT, GPIO_AF_1, RS485_DE_PIN);
gpio_mode_set(RS485_DE_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, RS485_DE_PIN);
gpio_output_options_set(RS485_DE_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, RS485_DE_PIN);
#endif
/* 配置波特率、数据位、停止位等 */
usart_deinit(UART_PHY);
usart_word_length_set(UART_PHY, USART_WL_8BIT);
@@ -26,6 +34,13 @@ void uart_init(void) {
usart_receive_config(UART_PHY, USART_RECEIVE_ENABLE);
usart_transmit_config(UART_PHY, USART_TRANSMIT_ENABLE);
#if RS485_MODE == CFG_ENABLE
// 配置 RS485 模式
usart_rs485_driver_enable(UART_PHY);
usart_driver_assertime_config(UART_PHY, 10);
usart_driver_deassertime_config(UART_PHY, 10);
#endif
usart_enable(UART_PHY);
nvic_irq_enable(UART_IRQ, 0);