generated from hulk/gd32e23x_template_cmake_vscode
feat(i2c): 导入模板 IIC 驱动改进(总线恢复重试/超时辅助函数/read_raw/scan AERR 处理)
This commit is contained in:
@@ -89,9 +89,9 @@ i2c_result_t i2c_bus_reset(void);
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void i2c_scan(void);
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void i2c_scan(void);
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/*!
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/*!
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\brief write 16-bit data to I2C device
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\brief write 16-bit data to I2C device (8-bit register address + 2 data bytes)
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\param[in] slave_addr: 7-bit slave address
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\param[in] slave_addr: 7-bit slave address
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\param[in] reg_addr: register address
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\param[in] reg_addr: register address (8-bit)
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\param[in] data: pointer to 2-byte data array
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\param[in] data: pointer to 2-byte data array
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\param[out] none
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\param[out] none
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\retval i2c_result_t
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\retval i2c_result_t
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@@ -99,9 +99,9 @@ void i2c_scan(void);
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i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]);
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i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]);
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/*!
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/*!
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\brief read 16-bit data from I2C device
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\brief read 16-bit data from I2C device (8-bit register address + 2 data bytes)
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\param[in] slave_addr: 7-bit slave address
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\param[in] slave_addr: 7-bit slave address
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\param[in] reg_addr: register address
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\param[in] reg_addr: register address (8-bit)
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\param[out] data: pointer to 2-byte data buffer
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\param[out] data: pointer to 2-byte data buffer
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\retval i2c_result_t
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\retval i2c_result_t
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*/
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*/
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@@ -111,70 +111,33 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
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/*!
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/*!
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\brief write data to I2C device with configurable length
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\brief write data to I2C device with configurable length
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] reg_addr: register address
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\param[in] reg_addr: register address (16-bit, high byte first)
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\param[in] data: pointer to data buffer
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\param[in] data: pointer to data buffer
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\param[in] length: number of bytes to write (1-255)
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\param[in] length: number of bytes to write (1-255)
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\param[out] none
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\param[out] none
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\retval i2c_result_t: operation result
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\retval i2c_result_t: operation result
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*/
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*/
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i2c_result_t i2c_write(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t length);
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i2c_result_t i2c_write(uint8_t slave_addr, uint16_t reg_addr, uint8_t *data, uint8_t length);
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/*!
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/*!
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\brief read data from I2C device with configurable length
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\brief read data from I2C device with configurable length
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] reg_addr: register address
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\param[in] reg_addr: register address (16-bit, high byte first)
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\param[out] data: pointer to data buffer
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\param[out] data: pointer to data buffer
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\param[in] length: number of bytes to read (1-255)
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\param[in] length: number of bytes to read (1-255)
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\retval i2c_result_t: operation result
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\retval i2c_result_t: operation result
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*/
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*/
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i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t length);
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i2c_result_t i2c_read(uint8_t slave_addr, uint16_t reg_addr, uint8_t *data, uint8_t length);
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/* Convenience functions for common operations */
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/* Pure read response without sub-address phase (for commands that already sent read request parameters) */
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/*!
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/*!
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\brief write single byte to I2C device
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\brief read data from I2C device without register/sub-address phase
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] reg_addr: register address
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\param[in] data: data byte to write
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\retval i2c_result_t: operation result
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*/
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i2c_result_t i2c_write_8bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data);
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/*!
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\brief read single byte from I2C device
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] reg_addr: register address
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\param[out] data: pointer to data byte
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\retval i2c_result_t: operation result
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*/
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i2c_result_t i2c_read_8bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data);
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/*!
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\brief write 32-bit data to I2C device
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] reg_addr: register address
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\param[in] data: pointer to 4-byte data array
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\retval i2c_result_t: operation result
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*/
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i2c_result_t i2c_write_32bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[4]);
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/*!
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\brief read 32-bit data from I2C device
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] reg_addr: register address
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\param[out] data: pointer to 4-byte data buffer
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\retval i2c_result_t: operation result
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*/
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i2c_result_t i2c_read_32bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data);
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/*!
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\brief read display panel parameters (multi-byte)
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\param[in] slave_addr: slave device address (7-bit)
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\param[in] reg_addr: register address
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\param[out] data: pointer to data buffer
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\param[out] data: pointer to data buffer
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\param[in] length: number of bytes to read (1-13)
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\param[in] length: number of bytes to read (1-255)
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\retval i2c_result_t: operation result
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\retval i2c_result_t: operation result
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*/
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*/
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i2c_result_t i2c_read_display_params(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t length);
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i2c_result_t i2c_read_raw(uint8_t slave_addr, uint8_t *data, uint8_t length);
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#ifdef DEBUG_VERBOSE
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#ifdef DEBUG_VERBOSE
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/*!
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/*!
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@@ -34,6 +34,7 @@ void i2c_gpio_config(void) {
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i2c_result_t i2c_config(void) {
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i2c_result_t i2c_config(void) {
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/* configure I2C GPIO */
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/* configure I2C GPIO */
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i2c_gpio_config();
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i2c_gpio_config();
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/* enable I2C clock */
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/* enable I2C clock */
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rcu_periph_clock_enable(RCU_I2C);
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rcu_periph_clock_enable(RCU_I2C);
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/* configure I2C clock */
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/* configure I2C clock */
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@@ -149,7 +150,7 @@ i2c_result_t i2c_bus_reset(void) {
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}
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}
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#ifdef DEBUG_VERBOSE
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#ifdef DEBUG_VERBOSE
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printf("I2C bus reset: bus recovered\r\n");
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printf("I2C bus reset: bus recovered\r\n");
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#endif
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#endif
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/* 8. Reconfigure & enable peripheral */
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/* 8. Reconfigure & enable peripheral */
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i2c_config();
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i2c_config();
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@@ -197,10 +198,12 @@ void i2c_scan(void) {
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i2c_master_addressing(I2C0, (address << 1), I2C_TRANSMITTER);
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i2c_master_addressing(I2C0, (address << 1), I2C_TRANSMITTER);
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timeout = 0;
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timeout = 0;
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// 等待地址发送完成
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// 等待地址发送完成或错误
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while (!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND) && (timeout < I2C_TIME_OUT))
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while (!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND) && !i2c_flag_get(I2C0, I2C_FLAG_AERR) && (timeout < I2C_TIME_OUT))
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timeout++;
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timeout++;
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if (timeout < I2C_TIME_OUT) {
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if (timeout < I2C_TIME_OUT && i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) {
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// 设备响应 - 清除地址标志
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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// printf("Found device at 0x%02X\r\n", address);
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// printf("Found device at 0x%02X\r\n", address);
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const char* msg2_prefix = "Found device at 0x";
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const char* msg2_prefix = "Found device at 0x";
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@@ -221,6 +224,9 @@ void i2c_scan(void) {
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}
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}
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
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found_devices++;
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found_devices++;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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// 设备无响应 - 清除错误标志
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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}
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}
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// 生成停止条件
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// 生成停止条件
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@@ -263,6 +269,53 @@ void i2c_scan(void) {
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}
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}
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}
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}
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/**
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* @brief 内部辅助函数:等待指定的I2C标志位被设置,带有超时。
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* @param[in] flag: 要等待的I2C事件标志。
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* @retval i2c_result_t: I2C_RESULT_SUCCESS 或 I2C_RESULT_TIMEOUT。
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*/
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static i2c_result_t _i2c_wait_flag_timeout(uint32_t flag)
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{
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uint16_t timeout = 0;
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while(!i2c_flag_get(I2C0, flag)){
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if(timeout++ > I2C_TIME_OUT){
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#ifdef DEBUG_VERBOSE
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const char* fname = "UNKNOWN";
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switch (flag) {
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case I2C_FLAG_SBSEND: fname = "SBSEND"; break;
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case I2C_FLAG_ADDSEND: fname = "ADDSEND"; break;
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case I2C_FLAG_TBE: fname = "TBE"; break;
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case I2C_FLAG_RBNE: fname = "RBNE"; break;
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case I2C_FLAG_BTC: fname = "BTC"; break;
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case I2C_FLAG_AERR: fname = "AERR"; break;
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case I2C_FLAG_BERR: fname = "BERR"; break;
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case I2C_FLAG_LOSTARB: fname = "LOSTARB"; break;
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case I2C_FLAG_I2CBSY: fname = "I2CBSY"; break;
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}
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printf("I2C wait flag timeout: flag=0x%08X (%s)\r\n", (unsigned int)flag, fname);
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#endif
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return I2C_RESULT_TIMEOUT;
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}
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}
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return I2C_RESULT_SUCCESS;
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}
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/**
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* @brief 内部辅助函数:等待指定的I2C标志位被清除,带有超时。
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* @param[in] flag: 要等待的I2C事件标志。
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* @retval i2c_result_t: I2C_RESULT_SUCCESS 或 I2C_RESULT_TIMEOUT。
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*/
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static i2c_result_t _i2c_wait_flag_clear_timeout(uint32_t flag)
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{
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uint16_t timeout = 0;
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while(i2c_flag_get(I2C0, flag)){
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if(timeout++ > I2C_TIME_OUT){
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return I2C_RESULT_TIMEOUT;
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}
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}
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return I2C_RESULT_SUCCESS;
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}
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i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]) {
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i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]) {
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i2c_state_t state = I2C_STATE_START;
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i2c_state_t state = I2C_STATE_START;
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uint16_t timeout = 0;
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uint16_t timeout = 0;
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@@ -325,7 +378,7 @@ i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data
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} else {
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} else {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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timeout =0;
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timeout =0;
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#ifdef DEBUG_VERBOES
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#ifdef DEBUG_VERBOSE
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printf("IIC write failed for Error Slave Address. \n");
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printf("IIC write failed for Error Slave Address. \n");
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#endif
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#endif
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return I2C_RESULT_NACK;
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return I2C_RESULT_NACK;
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@@ -333,39 +386,28 @@ i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data
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case I2C_STATE_TRANSMIT_REG:
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case I2C_STATE_TRANSMIT_REG:
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/* wait until the transmit data buffer is empty */
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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state = I2C_STATE_ERROR;
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break;
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break;
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}
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}
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/* send register address */
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/* send register address */
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i2c_data_transmit(I2C0, reg_addr);
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i2c_data_transmit(I2C0, reg_addr);
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timeout = 0;
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state = I2C_STATE_TRANSMIT_DATA;
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state = I2C_STATE_TRANSMIT_DATA;
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break;
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break;
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case I2C_STATE_TRANSMIT_DATA:
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case I2C_STATE_TRANSMIT_DATA:
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/* wait until the transmit data buffer is empty */
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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state = I2C_STATE_ERROR;
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break;
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break;
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}
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}
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/* send register MSB value */
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/* send register MSB value */
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i2c_data_transmit(I2C0, data[0]);
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i2c_data_transmit(I2C0, data[0]);
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timeout = 0;
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/* wait until the transmit data buffer is empty */
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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state = I2C_STATE_ERROR;
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break;
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break;
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}
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}
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@@ -381,13 +423,9 @@ i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data
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/* send register LSB value */
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/* send register LSB value */
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i2c_data_transmit(I2C0, data[1]);
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i2c_data_transmit(I2C0, data[1]);
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timeout = 0;
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/* wait until BTC bit is set */
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/* wait until BTC bit is set */
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while (!i2c_flag_get(I2C0, I2C_FLAG_BTC) && (timeout < I2C_TIME_OUT)) {
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if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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state = I2C_STATE_ERROR;
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break;
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break;
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}
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}
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@@ -413,25 +451,13 @@ i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data
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return I2C_RESULT_SUCCESS;
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return I2C_RESULT_SUCCESS;
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case I2C_STATE_ERROR:
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case I2C_STATE_ERROR:
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/* send a stop condition to I2C bus */
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/* I2C bus error, try to reset the bus and retry */
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i2c_stop_on_bus(I2C0);
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i2c_bus_reset();
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timeout = 0;
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while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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return I2C_RESULT_ERROR;
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}
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|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_BERR);
|
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_LOSTARB);
|
|
||||||
|
|
||||||
retry_count ++;
|
retry_count ++;
|
||||||
if (retry_count >= I2C_MAX_RETRY)
|
if (retry_count >= I2C_MAX_RETRY)
|
||||||
{
|
{
|
||||||
#ifdef DEBUG_VERBOES
|
#ifdef DEBUG_VERBOSE
|
||||||
printf("IIC write failed after %d retries\n", I2C_MAX_RETRY);
|
printf("IIC write failed after %d retries\n", I2C_MAX_RETRY);
|
||||||
#endif
|
#endif
|
||||||
return I2C_RESULT_ERROR;
|
return I2C_RESULT_ERROR;
|
||||||
@@ -472,11 +498,8 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
case I2C_STATE_START:
|
case I2C_STATE_START:
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
|
|
||||||
// wait for bus to be idle
|
/* wait for bus to be idle */
|
||||||
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -484,15 +507,11 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
// send start condition
|
// send start condition
|
||||||
i2c_start_on_bus(I2C0);
|
i2c_start_on_bus(I2C0);
|
||||||
state = I2C_STATE_SEND_ADDRESS;
|
state = I2C_STATE_SEND_ADDRESS;
|
||||||
timeout = 0;
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_STATE_SEND_ADDRESS:
|
case I2C_STATE_SEND_ADDRESS:
|
||||||
/* wait for start condition to be sent */
|
/* wait for start condition to be sent */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -540,10 +559,7 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
|
|
||||||
case I2C_STATE_TRANSMIT_DATA:
|
case I2C_STATE_TRANSMIT_DATA:
|
||||||
/* wait for transmit buffer to be empty */
|
/* wait for transmit buffer to be empty */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -551,15 +567,11 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
/* send register address */
|
/* send register address */
|
||||||
i2c_data_transmit(I2C0, reg_addr);
|
i2c_data_transmit(I2C0, reg_addr);
|
||||||
state = I2C_STATE_RESTART;
|
state = I2C_STATE_RESTART;
|
||||||
timeout = 0;
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_STATE_RESTART:
|
case I2C_STATE_RESTART:
|
||||||
/* wait for byte transfer complete BTC: Bit Transfer Complete */
|
/* wait for byte transfer complete BTC: Bit Transfer Complete */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -568,11 +580,7 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
i2c_start_on_bus(I2C0);
|
i2c_start_on_bus(I2C0);
|
||||||
|
|
||||||
/* wait for repeated start condition to be sent */
|
/* wait for repeated start condition to be sent */
|
||||||
timeout = 0;
|
if(_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -588,10 +596,7 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
|
|
||||||
case I2C_STATE_RECEIVE_DATA:
|
case I2C_STATE_RECEIVE_DATA:
|
||||||
/* Wait for BTC (both bytes received) */
|
/* Wait for BTC (both bytes received) */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -621,13 +626,13 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
return I2C_RESULT_SUCCESS;
|
return I2C_RESULT_SUCCESS;
|
||||||
|
|
||||||
case I2C_STATE_ERROR:
|
case I2C_STATE_ERROR:
|
||||||
/* send stop condition to release bus */
|
/* I2C bus error, try to reset the bus and retry */
|
||||||
i2c_stop_on_bus(I2C0);
|
i2c_bus_reset();
|
||||||
|
|
||||||
retry_count++;
|
retry_count++;
|
||||||
if (retry_count >= I2C_MAX_RETRY) {
|
if (retry_count >= I2C_MAX_RETRY) {
|
||||||
#ifdef DEBUG_VERBOES
|
#ifdef DEBUG_VERBOSE
|
||||||
printf("IIC read failed after %d retries\n", I2C_RETRY_MAX);
|
printf("IIC read failed after %d retries\n", I2C_MAX_RETRY);
|
||||||
#endif
|
#endif
|
||||||
return I2C_RESULT_ERROR;
|
return I2C_RESULT_ERROR;
|
||||||
}
|
}
|
||||||
@@ -652,13 +657,13 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
/*!
|
/*!
|
||||||
\brief write data to I2C device with configurable length
|
\brief write data to I2C device with configurable length
|
||||||
\param[in] slave_addr: slave device address (7-bit)
|
\param[in] slave_addr: slave device address (7-bit)
|
||||||
\param[in] reg_addr: register address
|
\param[in] reg_addr: register address (16-bit, high byte first)
|
||||||
\param[in] data: pointer to data buffer
|
\param[in] data: pointer to data buffer
|
||||||
\param[in] length: number of bytes to write (1-255)
|
\param[in] length: number of bytes to write (1-255)
|
||||||
\param[out] none
|
\param[out] none
|
||||||
\retval i2c_result_t: operation result
|
\retval i2c_result_t: operation result
|
||||||
*/
|
*/
|
||||||
i2c_result_t i2c_write(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t length) {
|
i2c_result_t i2c_write(uint8_t slave_addr, uint16_t reg_addr, uint8_t *data, uint8_t length) {
|
||||||
i2c_state_t state = I2C_STATE_START;
|
i2c_state_t state = I2C_STATE_START;
|
||||||
uint16_t timeout = 0;
|
uint16_t timeout = 0;
|
||||||
uint8_t retry_count = 0;
|
uint8_t retry_count = 0;
|
||||||
@@ -666,6 +671,9 @@ i2c_result_t i2c_write(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint
|
|||||||
|
|
||||||
/* parameter validation */
|
/* parameter validation */
|
||||||
if (data == NULL || slave_addr > 0x7F || length == 0) {
|
if (data == NULL || slave_addr > 0x7F || length == 0) {
|
||||||
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C write invalid param: slave=0x%02X, len=%u, data=%p\r\n", slave_addr, length, data);
|
||||||
|
#endif
|
||||||
return I2C_RESULT_INVALID_PARAM;
|
return I2C_RESULT_INVALID_PARAM;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -719,67 +727,71 @@ i2c_result_t i2c_write(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint
|
|||||||
state = I2C_STATE_TRANSMIT_REG;
|
state = I2C_STATE_TRANSMIT_REG;
|
||||||
break;
|
break;
|
||||||
} else {
|
} else {
|
||||||
|
/* NACK received - address not acknowledged */
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
||||||
|
i2c_stop_on_bus(I2C0);
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
#ifdef DEBUG_VERBOSE
|
#ifdef DEBUG_VERBOSE
|
||||||
printf("IIC write failed for Error Slave Address. \n");
|
printf("I2C write failed for Error Slave Address. \n");
|
||||||
#endif
|
#endif
|
||||||
return I2C_RESULT_NACK;
|
return I2C_RESULT_NACK;
|
||||||
}
|
}
|
||||||
|
|
||||||
case I2C_STATE_TRANSMIT_REG:
|
case I2C_STATE_TRANSMIT_REG:
|
||||||
/* wait until the transmit data buffer is empty */
|
/* wait until the transmit data buffer is empty */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* send register address */
|
/* send register address, high byte first */
|
||||||
i2c_data_transmit(I2C0, reg_addr);
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
||||||
timeout = 0;
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
i2c_data_transmit(I2C0, (uint8_t)(reg_addr >> 8));
|
||||||
|
|
||||||
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
i2c_data_transmit(I2C0, (uint8_t)(reg_addr & 0xFF));
|
||||||
state = I2C_STATE_TRANSMIT_DATA;
|
state = I2C_STATE_TRANSMIT_DATA;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_STATE_TRANSMIT_DATA:
|
case I2C_STATE_TRANSMIT_DATA:
|
||||||
/* wait until the transmit data buffer is empty */
|
/* wait until the transmit data buffer is empty */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
while (data_index < length) {
|
||||||
timeout++;
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
||||||
}
|
state = I2C_STATE_ERROR;
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
break;
|
||||||
state = I2C_STATE_ERROR;
|
}
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* send data byte */
|
/* send data byte */
|
||||||
i2c_data_transmit(I2C0, data[data_index]);
|
i2c_data_transmit(I2C0, data[data_index]);
|
||||||
data_index++;
|
data_index++;
|
||||||
|
|
||||||
/* check for errors */
|
/* check for errors */
|
||||||
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
||||||
i2c_stop_on_bus(I2C0);
|
i2c_stop_on_bus(I2C0);
|
||||||
return I2C_RESULT_NACK;
|
return I2C_RESULT_NACK;
|
||||||
} else if (i2c_flag_get(I2C0, I2C_FLAG_BERR) || i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
|
} else if (i2c_flag_get(I2C0, I2C_FLAG_BERR) || i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
|
||||||
i2c_stop_on_bus(I2C0);
|
i2c_stop_on_bus(I2C0);
|
||||||
return I2C_RESULT_ERROR;
|
return I2C_RESULT_ERROR;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
if(state == I2C_STATE_ERROR) break;
|
||||||
|
|
||||||
|
|
||||||
/* check if all data has been sent */
|
/* check if all data has been sent */
|
||||||
if (data_index >= length) {
|
if (data_index >= length) {
|
||||||
/* wait until BTC bit is set for last byte */
|
/* wait until BTC bit is set for last byte */
|
||||||
timeout = 0;
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
||||||
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC) && (timeout < I2C_TIME_OUT)) {
|
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
state = I2C_STATE_STOP;
|
state = I2C_STATE_STOP;
|
||||||
}
|
}
|
||||||
timeout = 0;
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_STATE_STOP:
|
case I2C_STATE_STOP:
|
||||||
@@ -799,17 +811,8 @@ i2c_result_t i2c_write(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint
|
|||||||
return I2C_RESULT_SUCCESS;
|
return I2C_RESULT_SUCCESS;
|
||||||
|
|
||||||
case I2C_STATE_ERROR:
|
case I2C_STATE_ERROR:
|
||||||
/* send a stop condition to I2C bus */
|
/* I2C bus error, try to reset the bus and retry */
|
||||||
i2c_stop_on_bus(I2C0);
|
i2c_bus_reset();
|
||||||
|
|
||||||
timeout = 0;
|
|
||||||
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
|
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_BERR);
|
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_LOSTARB);
|
|
||||||
|
|
||||||
retry_count++;
|
retry_count++;
|
||||||
if (retry_count >= I2C_MAX_RETRY) {
|
if (retry_count >= I2C_MAX_RETRY) {
|
||||||
@@ -838,12 +841,12 @@ i2c_result_t i2c_write(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint
|
|||||||
/*!
|
/*!
|
||||||
\brief read data from I2C device with configurable length
|
\brief read data from I2C device with configurable length
|
||||||
\param[in] slave_addr: slave device address (7-bit)
|
\param[in] slave_addr: slave device address (7-bit)
|
||||||
\param[in] reg_addr: register address
|
\param[in] reg_addr: register address (16-bit, high byte first)
|
||||||
\param[out] data: pointer to data buffer
|
\param[out] data: pointer to data buffer
|
||||||
\param[in] length: number of bytes to read (1-255)
|
\param[in] length: number of bytes to read (1-255)
|
||||||
\retval i2c_result_t: operation result
|
\retval i2c_result_t: operation result
|
||||||
*/
|
*/
|
||||||
i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t length) {
|
i2c_result_t i2c_read(uint8_t slave_addr, uint16_t reg_addr, uint8_t *data, uint8_t length) {
|
||||||
i2c_state_t state = I2C_STATE_START;
|
i2c_state_t state = I2C_STATE_START;
|
||||||
uint16_t timeout = 0;
|
uint16_t timeout = 0;
|
||||||
uint8_t retry_count = 0;
|
uint8_t retry_count = 0;
|
||||||
@@ -858,6 +861,10 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
/* enable acknowledge */
|
/* enable acknowledge */
|
||||||
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||||
|
|
||||||
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C read start: slave=0x%02X reg=0x%02X len=%u\r\n", slave_addr, reg_addr, length);
|
||||||
|
#endif
|
||||||
|
|
||||||
while (retry_count < (uint8_t)I2C_MAX_RETRY) {
|
while (retry_count < (uint8_t)I2C_MAX_RETRY) {
|
||||||
switch (state) {
|
switch (state) {
|
||||||
case I2C_STATE_START:
|
case I2C_STATE_START:
|
||||||
@@ -865,10 +872,7 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
data_index = 0;
|
data_index = 0;
|
||||||
|
|
||||||
/* wait for bus to be idle */
|
/* wait for bus to be idle */
|
||||||
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -876,15 +880,11 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
/* send start condition */
|
/* send start condition */
|
||||||
i2c_start_on_bus(I2C0);
|
i2c_start_on_bus(I2C0);
|
||||||
state = I2C_STATE_SEND_ADDRESS;
|
state = I2C_STATE_SEND_ADDRESS;
|
||||||
timeout = 0;
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_STATE_SEND_ADDRESS:
|
case I2C_STATE_SEND_ADDRESS:
|
||||||
/* wait for start condition to be sent */
|
/* wait for start condition to be sent */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -912,67 +912,92 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* debug: show address ack and error flags */
|
||||||
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C CLEAR_ADDRESS: write_phase=%d ADDSEND=%d AERR=%d\r\n",
|
||||||
|
(int)write_phase,
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_ADDSEND),
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_AERR));
|
||||||
|
#endif
|
||||||
|
|
||||||
if (write_phase) {
|
if (write_phase) {
|
||||||
/* clear address flag (write phase) */
|
/* clear address flag (write phase) */
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||||
state = I2C_STATE_TRANSMIT_DATA;
|
state = I2C_STATE_TRANSMIT_DATA;
|
||||||
} else {
|
} else {
|
||||||
/* read phase setup based on length */
|
/* READ phase: handle ACK/ACKPOS based on requested length
|
||||||
|
- length == 1: disable ACK before clearing ADDR
|
||||||
|
- length == 2: set ACKPOS_NEXT and disable ACK before clearing ADDR
|
||||||
|
- length > 2: keep ACK enabled and clear ADDR; we'll handle N-2/BTF sequence later */
|
||||||
if (length == 1) {
|
if (length == 1) {
|
||||||
/* single byte read: disable ACK before clearing ADDR */
|
|
||||||
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
#ifdef DEBUG_VERBOSE
|
||||||
/* send STOP immediately after clearing ADDR for single byte */
|
printf("I2C READ phase: length=1, disabling ACK before clearing ADDSEND\r\n");
|
||||||
i2c_stop_on_bus(I2C0);
|
#endif
|
||||||
} else if (length == 2) {
|
} else if (length == 2) {
|
||||||
/* two bytes read: set POS=NEXT and disable ACK before clearing ADDR */
|
|
||||||
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
||||||
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C READ phase: length=2, set ACKPOS_NEXT and disabling ACK before clearing ADDSEND\r\n");
|
||||||
|
#endif
|
||||||
} else {
|
} else {
|
||||||
/* multi-byte read: clear ADDR with ACK enabled */
|
/* length > 2: keep ACK enabled so slave will clock out data */
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||||
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C READ phase: length=%u (>2), keeping ACK enabled\r\n", length);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* now clear address flag to release SCL and enter data phase */
|
||||||
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||||
|
|
||||||
state = I2C_STATE_RECEIVE_DATA;
|
state = I2C_STATE_RECEIVE_DATA;
|
||||||
}
|
}
|
||||||
|
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_STATE_TRANSMIT_DATA:
|
case I2C_STATE_TRANSMIT_DATA:
|
||||||
/* wait for transmit buffer to be empty */
|
/* wait for transmit buffer to be empty */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* send register address */
|
/* send register address, high byte first */
|
||||||
i2c_data_transmit(I2C0, reg_addr);
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
i2c_data_transmit(I2C0, (uint8_t)(reg_addr >> 8));
|
||||||
|
|
||||||
|
if(_i2c_wait_flag_timeout(I2C_FLAG_TBE) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
i2c_data_transmit(I2C0, (uint8_t)(reg_addr & 0xFF));
|
||||||
state = I2C_STATE_RESTART;
|
state = I2C_STATE_RESTART;
|
||||||
timeout = 0;
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_STATE_RESTART:
|
case I2C_STATE_RESTART:
|
||||||
/* wait for byte transfer complete */
|
/* wait for byte transfer complete */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C RESTART: after BTC, delay 5ms and issuing repeated START\r\n");
|
||||||
|
#endif
|
||||||
|
/* small delay to allow slave device to prepare multi-byte data before repeated start */
|
||||||
|
/* increased to 5ms to improve reliability for DLPC multi-byte reads */
|
||||||
|
delay_ms(5);
|
||||||
|
|
||||||
/* generate repeated start condition */
|
/* generate repeated start condition */
|
||||||
i2c_start_on_bus(I2C0);
|
i2c_start_on_bus(I2C0);
|
||||||
|
|
||||||
/* wait for repeated start condition to be sent */
|
/* wait for repeated start condition to be sent */
|
||||||
timeout = 0;
|
if(_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -984,15 +1009,18 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
write_phase = false;
|
write_phase = false;
|
||||||
state = I2C_STATE_CLEAR_ADDRESS;
|
state = I2C_STATE_CLEAR_ADDRESS;
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C addressing sent for read (slave=0x%02X)\r\n", slave_addr);
|
||||||
|
#endif
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case I2C_STATE_RECEIVE_DATA:
|
case I2C_STATE_RECEIVE_DATA:
|
||||||
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C RECEIVE_DATA: expecting %u bytes\r\n", length);
|
||||||
|
#endif
|
||||||
if (length == 1) {
|
if (length == 1) {
|
||||||
/* single byte read */
|
/* single byte read */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -1000,10 +1028,7 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
state = I2C_STATE_STOP;
|
state = I2C_STATE_STOP;
|
||||||
} else if (length == 2) {
|
} else if (length == 2) {
|
||||||
/* two bytes read */
|
/* two bytes read */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -1016,40 +1041,39 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
} else {
|
} else {
|
||||||
/* multi-byte read (length > 2) */
|
/* multi-byte read (length > 2) */
|
||||||
while (data_index < length) {
|
while (data_index < length) {
|
||||||
/* wait for RBNE (receive buffer not empty) */
|
if (data_index < length - 2) {
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) && (timeout < I2C_TIME_OUT)) {
|
/* normal bytes: wait for RBNE and read with ACK */
|
||||||
timeout++;
|
if(_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* special handling for last 3 bytes */
|
|
||||||
if (data_index == length - 3) {
|
|
||||||
/* wait for BTF (byte transfer finished) before reading N-2 */
|
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
/* disable ACK for last 2 bytes */
|
data[data_index] = i2c_data_receive(I2C0);
|
||||||
|
data_index++;
|
||||||
|
} else if (data_index == length - 2) {
|
||||||
|
/* second to last byte: wait for BTF, then disable ACK and read */
|
||||||
|
if(_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* disable ACK before reading N-1 byte */
|
||||||
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||||
}
|
/* send STOP before reading N-1 byte */
|
||||||
|
|
||||||
/* read data byte */
|
|
||||||
data[data_index] = i2c_data_receive(I2C0);
|
|
||||||
data_index++;
|
|
||||||
|
|
||||||
/* send STOP after reading N-1 byte */
|
|
||||||
if (data_index == length - 1) {
|
|
||||||
i2c_stop_on_bus(I2C0);
|
i2c_stop_on_bus(I2C0);
|
||||||
|
/* read N-1 byte */
|
||||||
|
data[data_index] = i2c_data_receive(I2C0);
|
||||||
|
data_index++;
|
||||||
|
} else {
|
||||||
|
/* last byte: wait for RBNE and read */
|
||||||
|
if(_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* read last byte */
|
||||||
|
data[data_index] = i2c_data_receive(I2C0);
|
||||||
|
data_index++;
|
||||||
}
|
}
|
||||||
|
|
||||||
timeout = 0;
|
|
||||||
}
|
}
|
||||||
|
if(state == I2C_STATE_ERROR) break;
|
||||||
state = I2C_STATE_STOP;
|
state = I2C_STATE_STOP;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@@ -1072,8 +1096,11 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
return I2C_RESULT_SUCCESS;
|
return I2C_RESULT_SUCCESS;
|
||||||
|
|
||||||
case I2C_STATE_ERROR:
|
case I2C_STATE_ERROR:
|
||||||
/* send stop condition to release bus */
|
/* I2C bus error, try to reset the bus and retry */
|
||||||
i2c_stop_on_bus(I2C0);
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C_STATE_ERROR: resetting bus and retrying (retry_count=%u)\r\n", retry_count);
|
||||||
|
#endif
|
||||||
|
i2c_bus_reset();
|
||||||
|
|
||||||
/* reset ACK configuration */
|
/* reset ACK configuration */
|
||||||
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||||
@@ -1082,7 +1109,13 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
retry_count++;
|
retry_count++;
|
||||||
if (retry_count >= I2C_MAX_RETRY) {
|
if (retry_count >= I2C_MAX_RETRY) {
|
||||||
#ifdef DEBUG_VERBOSE
|
#ifdef DEBUG_VERBOSE
|
||||||
printf("I2C read failed after %d retries\n", I2C_MAX_RETRY);
|
/* Print diagnostic flags to help root-cause analysis */
|
||||||
|
printf("I2C read final failure after %d retries, last_state=%d\r\n", I2C_MAX_RETRY, state);
|
||||||
|
printf(" FLAGS: AERR=%d BERR=%d LOSTARB=%d I2CBSY=%d\r\n",
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_AERR),
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_BERR),
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_LOSTARB),
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_I2CBSY));
|
||||||
#endif
|
#endif
|
||||||
return I2C_RESULT_ERROR;
|
return I2C_RESULT_ERROR;
|
||||||
}
|
}
|
||||||
@@ -1101,39 +1134,179 @@ i2c_result_t i2c_read(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
/* timeout path: provide debug info */
|
||||||
|
#ifdef DEBUG_VERBOSE
|
||||||
|
printf("I2C read timeout (end state). slave=0x%02X, len=%u\r\n", slave_addr, length);
|
||||||
|
printf(" FLAGS: AERR=%d BERR=%d LOSTARB=%d I2CBSY=%d\r\n",
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_AERR),
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_BERR),
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_LOSTARB),
|
||||||
|
(int)i2c_flag_get(I2C0, I2C_FLAG_I2CBSY));
|
||||||
|
#endif
|
||||||
return I2C_RESULT_TIMEOUT;
|
return I2C_RESULT_TIMEOUT;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* convenience functions for common operations */
|
/*!
|
||||||
i2c_result_t i2c_write_8bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data) {
|
\brief read data from I2C device without register/sub-address phase
|
||||||
return i2c_write(slave_addr, reg_addr, &data, 1);
|
\param[in] slave_addr: slave device address (7-bit)
|
||||||
}
|
\param[out] data: pointer to data buffer
|
||||||
|
\param[in] length: number of bytes to read (1-255)
|
||||||
|
\retval i2c_result_t: operation result
|
||||||
|
*/
|
||||||
|
i2c_result_t i2c_read_raw(uint8_t slave_addr, uint8_t *data, uint8_t length)
|
||||||
|
{
|
||||||
|
i2c_state_t state = I2C_STATE_START;
|
||||||
|
uint16_t timeout = 0;
|
||||||
|
uint8_t retry_count = 0;
|
||||||
|
uint8_t data_index = 0;
|
||||||
|
|
||||||
i2c_result_t i2c_read_8bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data) {
|
if (data == NULL || slave_addr > 0x7F || length == 0) {
|
||||||
return i2c_read(slave_addr, reg_addr, data, 1);
|
|
||||||
}
|
|
||||||
|
|
||||||
i2c_result_t i2c_write_32bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[4]) {
|
|
||||||
return i2c_write(slave_addr, reg_addr, data, 4);
|
|
||||||
}
|
|
||||||
|
|
||||||
i2c_result_t i2c_read_32bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data) {
|
|
||||||
return i2c_read(slave_addr, reg_addr, data, 4);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* 显示面板专用函数 - 支持读取显示界面参数 */
|
|
||||||
i2c_result_t i2c_read_display_params(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data, uint8_t length) {
|
|
||||||
/* 针对显示面板的多字节读取,支持13字节的完整参数读取 */
|
|
||||||
if (length > 13) {
|
|
||||||
return I2C_RESULT_INVALID_PARAM;
|
return I2C_RESULT_INVALID_PARAM;
|
||||||
}
|
}
|
||||||
return i2c_read(slave_addr, reg_addr, data, length);
|
|
||||||
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||||
|
|
||||||
|
while (retry_count < (uint8_t)I2C_MAX_RETRY) {
|
||||||
|
switch (state) {
|
||||||
|
case I2C_STATE_START:
|
||||||
|
timeout = 0;
|
||||||
|
data_index = 0;
|
||||||
|
|
||||||
|
if (_i2c_wait_flag_clear_timeout(I2C_FLAG_I2CBSY) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
i2c_start_on_bus(I2C0);
|
||||||
|
state = I2C_STATE_SEND_ADDRESS;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case I2C_STATE_SEND_ADDRESS:
|
||||||
|
if (_i2c_wait_flag_timeout(I2C_FLAG_SBSEND) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_RECEIVER);
|
||||||
|
state = I2C_STATE_CLEAR_ADDRESS;
|
||||||
|
timeout = 0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case I2C_STATE_CLEAR_ADDRESS:
|
||||||
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (!i2c_flag_get(I2C0, I2C_FLAG_AERR)) && (timeout < I2C_TIME_OUT)) {
|
||||||
|
timeout++;
|
||||||
|
}
|
||||||
|
if (timeout >= I2C_TIME_OUT) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
||||||
|
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
||||||
|
i2c_stop_on_bus(I2C0);
|
||||||
|
return I2C_RESULT_NACK;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (length == 1) {
|
||||||
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||||
|
} else if (length == 2) {
|
||||||
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
||||||
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||||
|
} else {
|
||||||
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||||
|
state = I2C_STATE_RECEIVE_DATA;
|
||||||
|
timeout = 0;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case I2C_STATE_RECEIVE_DATA:
|
||||||
|
if (length == 1) {
|
||||||
|
if (_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
data[0] = i2c_data_receive(I2C0);
|
||||||
|
state = I2C_STATE_STOP;
|
||||||
|
} else if (length == 2) {
|
||||||
|
if (_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
i2c_stop_on_bus(I2C0);
|
||||||
|
data[0] = i2c_data_receive(I2C0);
|
||||||
|
data[1] = i2c_data_receive(I2C0);
|
||||||
|
state = I2C_STATE_STOP;
|
||||||
|
} else {
|
||||||
|
while (data_index < length) {
|
||||||
|
if (data_index < length - 2) {
|
||||||
|
if (_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
data[data_index++] = i2c_data_receive(I2C0);
|
||||||
|
} else if (data_index == length - 2) {
|
||||||
|
if (_i2c_wait_flag_timeout(I2C_FLAG_BTC) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||||
|
i2c_stop_on_bus(I2C0);
|
||||||
|
data[data_index++] = i2c_data_receive(I2C0);
|
||||||
|
} else {
|
||||||
|
if (_i2c_wait_flag_timeout(I2C_FLAG_RBNE) != I2C_RESULT_SUCCESS) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
data[data_index++] = i2c_data_receive(I2C0);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (state == I2C_STATE_ERROR) break;
|
||||||
|
state = I2C_STATE_STOP;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case I2C_STATE_STOP:
|
||||||
|
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
||||||
|
timeout++;
|
||||||
|
}
|
||||||
|
if (timeout >= I2C_TIME_OUT) {
|
||||||
|
state = I2C_STATE_ERROR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||||
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
|
||||||
|
return I2C_RESULT_SUCCESS;
|
||||||
|
|
||||||
|
case I2C_STATE_ERROR:
|
||||||
|
i2c_bus_reset();
|
||||||
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||||
|
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
|
||||||
|
|
||||||
|
retry_count++;
|
||||||
|
if (retry_count >= I2C_MAX_RETRY) {
|
||||||
|
return I2C_RESULT_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
state = I2C_STATE_START;
|
||||||
|
timeout = 0;
|
||||||
|
delay_10us(10);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
state = I2C_STATE_START;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return I2C_RESULT_TIMEOUT;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef DEBUG_VERBOSE
|
#ifdef DEBUG_VERBOSE
|
||||||
/*!
|
/*!
|
||||||
\brief get status string for debugging
|
\brief get status string for debugging
|
||||||
\param[in] status: i2c_status_t value
|
\param[in] status: i2c_result_t value
|
||||||
\param[out] none
|
\param[out] none
|
||||||
\retval const char* status string
|
\retval const char* status string
|
||||||
*/
|
*/
|
||||||
|
|||||||
+1
-2
@@ -86,8 +86,7 @@ tmp112a_status_t tmp112a_read_temperature(tmp112a_result_t *result) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
void tmp112a_get_raw_temperature_value(uint8_t *value) {
|
void tmp112a_get_raw_temperature_value(uint8_t *value) {
|
||||||
// i2c_read_16bits(TMP112A_ADDR, TMP112A_TEMP_REG, value);
|
i2c_read_16bits(TMP112A_ADDR, TMP112A_TEMP_REG, value);
|
||||||
i2c_read(TMP112A_ADDR, TMP112A_TEMP_REG, value, 2);
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user