709 lines
20 KiB
C
709 lines
20 KiB
C
/**************************************************************************//**
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* @file cmsis_clang.h
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* @brief CMSIS compiler LLVM/Clang header file
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* @version V6.0.0
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* @date 27. July 2024
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******************************************************************************/
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/*
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* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __CMSIS_CLANG_H
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#define __CMSIS_CLANG_H
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#pragma clang system_header /* treat file as system include file */
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#if (__ARM_ACLE >= 200)
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#include <arm_acle.h>
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#else
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#error Compiler must support ACLE V2.0
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#endif /* (__ARM_ACLE >= 200) */
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/* Fallback for __has_builtin */
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#ifndef __has_builtin
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#define __has_builtin(x) (0)
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#endif
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/* CMSIS compiler specific defines */
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#ifndef __ASM
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#define __ASM __asm
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#endif
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#ifndef __INLINE
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#define __INLINE inline
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#endif
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#ifndef __STATIC_INLINE
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#define __STATIC_INLINE static inline
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#endif
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#ifndef __STATIC_FORCEINLINE
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#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
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#endif
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#ifndef __NO_RETURN
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#define __NO_RETURN __attribute__((__noreturn__))
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#endif
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#ifndef CMSIS_DEPRECATED
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#define CMSIS_DEPRECATED __attribute__((deprecated))
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#endif
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#ifndef __USED
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#define __USED __attribute__((used))
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#endif
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#ifndef __WEAK
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#define __WEAK __attribute__((weak))
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#endif
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#ifndef __PACKED
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#define __PACKED __attribute__((packed, aligned(1)))
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#endif
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#ifndef __PACKED_STRUCT
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#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
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#endif
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#ifndef __PACKED_UNION
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#define __PACKED_UNION union __attribute__((packed, aligned(1)))
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#endif
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#ifndef __UNALIGNED_UINT16_WRITE
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wpacked"
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__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
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#pragma clang diagnostic pop
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#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
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#endif
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#ifndef __UNALIGNED_UINT16_READ
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wpacked"
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__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
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#pragma clang diagnostic pop
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#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
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#endif
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#ifndef __UNALIGNED_UINT32_WRITE
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wpacked"
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__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
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#pragma clang diagnostic pop
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#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
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#endif
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#ifndef __UNALIGNED_UINT32_READ
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#pragma clang diagnostic push
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#pragma clang diagnostic ignored "-Wpacked"
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__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
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#pragma clang diagnostic pop
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#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
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#endif
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#ifndef __ALIGNED
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#define __ALIGNED(x) __attribute__((aligned(x)))
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#endif
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#ifndef __RESTRICT
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#define __RESTRICT __restrict
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#endif
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#ifndef __COMPILER_BARRIER
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#define __COMPILER_BARRIER() __ASM volatile("":::"memory")
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#endif
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#ifndef __NO_INIT
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#define __NO_INIT __attribute__ ((section (".noinit")))
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#endif
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#ifndef __ALIAS
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#define __ALIAS(x) __attribute__ ((alias(x)))
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#endif
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/* ########################## Core Instruction Access ######################### */
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/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
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Access to dedicated instructions
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@{
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*/
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/* Define macros for porting to both thumb1 and thumb2.
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* For thumb1, use low register (r0-r7), specified by constraint "l"
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* Otherwise, use general registers, specified by constraint "r" */
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#if defined (__thumb__) && !defined (__thumb2__)
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#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
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#define __CMSIS_GCC_RW_REG(r) "+l" (r)
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#define __CMSIS_GCC_USE_REG(r) "l" (r)
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#else
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#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
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#define __CMSIS_GCC_RW_REG(r) "+r" (r)
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#define __CMSIS_GCC_USE_REG(r) "r" (r)
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#endif
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/**
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\brief No Operation
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\details No Operation does nothing. This instruction can be used for code alignment purposes.
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*/
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#define __NOP() __nop()
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/**
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\brief Wait For Interrupt
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\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
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*/
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#define __WFI() __wfi()
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/**
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\brief Wait For Event
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\details Wait For Event is a hint instruction that permits the processor to enter
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a low-power state until one of a number of events occurs.
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*/
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#define __WFE() __wfe()
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/**
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\brief Send Event
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\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
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*/
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#define __SEV() __sev()
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/**
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\brief Instruction Synchronization Barrier
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\details Instruction Synchronization Barrier flushes the pipeline in the processor,
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so that all instructions following the ISB are fetched from cache or memory,
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after the instruction has been completed.
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*/
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#define __ISB() __isb(0xF)
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/**
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\brief Data Synchronization Barrier
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\details Acts as a special kind of Data Memory Barrier.
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It completes when all explicit memory accesses before this instruction complete.
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*/
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#define __DSB() __dsb(0xF)
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/**
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\brief Data Memory Barrier
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\details Ensures the apparent order of the explicit memory operations before
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and after the instruction, without ensuring their completion.
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*/
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#define __DMB() __dmb(0xF)
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/**
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\brief Reverse byte order (32 bit)
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\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
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\param [in] value Value to reverse
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\return Reversed value
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*/
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#define __REV(value) __rev(value)
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/**
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\brief Reverse byte order (16 bit)
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\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
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\param [in] value Value to reverse
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\return Reversed value
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*/
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#define __REV16(value) __rev16(value)
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/**
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\brief Reverse byte order (16 bit)
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\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
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\param [in] value Value to reverse
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\return Reversed value
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*/
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#define __REVSH(value) __revsh(value)
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/**
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\brief Rotate Right in unsigned value (32 bit)
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\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
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\param [in] op1 Value to rotate
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\param [in] op2 Number of Bits to rotate
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\return Rotated value
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*/
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#define __ROR(op1, op2) __ror(op1, op2)
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/**
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\brief Breakpoint
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\details Causes the processor to enter Debug state.
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Debug tools can use this to investigate system state when the instruction at a particular address is reached.
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\param [in] value is ignored by the processor.
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If required, a debugger can use it to store additional information about the breakpoint.
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*/
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#define __BKPT(value) __ASM volatile ("bkpt "#value)
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/**
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\brief Reverse bit order of value
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\details Reverses the bit order of the given value.
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\param [in] value Value to reverse
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\return Reversed value
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*/
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#define __RBIT(value) __rbit(value)
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/**
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\brief Count leading zeros
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\details Counts the number of leading zeros of a data value.
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\param [in] value Value to count the leading zeros
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\return number of leading zeros in value
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*/
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#define __CLZ(value) __clz(value)
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#if ((__ARM_FEATURE_SAT >= 1) && \
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(__ARM_ARCH_ISA_THUMB >= 2) )
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/* __ARM_FEATURE_SAT is wrong for Armv8-M Baseline devices */
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/**
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\brief Signed Saturate
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\details Saturates a signed value.
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\param [in] value Value to be saturated
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\param [in] sat Bit position to saturate to (1..32)
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\return Saturated value
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*/
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#define __SSAT(value, sat) __ssat(value, sat)
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/**
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\brief Unsigned Saturate
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\details Saturates an unsigned value.
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\param [in] value Value to be saturated
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\param [in] sat Bit position to saturate to (0..31)
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\return Saturated value
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*/
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#define __USAT(value, sat) __usat(value, sat)
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#else /* (__ARM_FEATURE_SAT >= 1) */
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/**
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\brief Signed Saturate
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\details Saturates a signed value.
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\param [in] value Value to be saturated
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\param [in] sat Bit position to saturate to (1..32)
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\return Saturated value
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*/
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__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
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{
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if ((sat >= 1U) && (sat <= 32U))
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{
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const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
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const int32_t min = -1 - max ;
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if (val > max)
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{
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return (max);
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}
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else if (val < min)
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{
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return (min);
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}
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}
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return (val);
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}
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/**
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\brief Unsigned Saturate
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\details Saturates an unsigned value.
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\param [in] value Value to be saturated
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\param [in] sat Bit position to saturate to (0..31)
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\return Saturated value
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*/
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__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
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{
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if (sat <= 31U)
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{
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const uint32_t max = ((1U << sat) - 1U);
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if (val > (int32_t)max)
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{
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return (max);
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}
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else if (val < 0)
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{
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return (0U);
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}
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}
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return ((uint32_t)val);
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}
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#endif /* (__ARM_FEATURE_SAT >= 1) */
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#if (__ARM_FEATURE_LDREX >= 1)
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/**
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\brief Remove the exclusive lock
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\details Removes the exclusive lock which is created by LDREX.
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*/
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#define __CLREX __builtin_arm_clrex
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/**
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\brief LDR Exclusive (8 bit)
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\details Executes a exclusive LDR instruction for 8 bit value.
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\param [in] ptr Pointer to data
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\return value of type uint8_t at (*ptr)
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*/
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#define __LDREXB (uint8_t)__builtin_arm_ldrex
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/**
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\brief STR Exclusive (8 bit)
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\details Executes a exclusive STR instruction for 8 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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\return 0 Function succeeded
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\return 1 Function failed
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*/
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#define __STREXB (uint32_t)__builtin_arm_strex
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#endif /* (__ARM_FEATURE_LDREX >= 1) */
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#if (__ARM_FEATURE_LDREX >= 2)
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/**
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\brief LDR Exclusive (16 bit)
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\details Executes a exclusive LDR instruction for 16 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint16_t at (*ptr)
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*/
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#define __LDREXH (uint16_t)__builtin_arm_ldrex
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/**
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\brief STR Exclusive (16 bit)
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\details Executes a exclusive STR instruction for 16 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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\return 0 Function succeeded
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\return 1 Function failed
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*/
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#define __STREXH (uint32_t)__builtin_arm_strex
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#endif /* (__ARM_FEATURE_LDREX >= 2) */
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#if (__ARM_FEATURE_LDREX >= 4)
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/**
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\brief LDR Exclusive (32 bit)
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\details Executes a exclusive LDR instruction for 32 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint32_t at (*ptr)
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*/
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#define __LDREXW (uint32_t)__builtin_arm_ldrex
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/**
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\brief STR Exclusive (32 bit)
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\details Executes a exclusive STR instruction for 32 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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\return 0 Function succeeded
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\return 1 Function failed
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*/
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#define __STREXW (uint32_t)__builtin_arm_strex
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#endif /* (__ARM_FEATURE_LDREX >= 4) */
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#if (__ARM_ARCH_ISA_THUMB >= 2)
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/**
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\brief Rotate Right with Extend (32 bit)
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\details Moves each bit of a bitstring right by one bit.
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The carry input is shifted in at the left end of the bitstring.
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\param [in] value Value to rotate
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\return Rotated value
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*/
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__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
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{
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uint32_t result;
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__ASM volatile ("rrx %0, %1" : "=r" (result) : "r" (value));
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return (result);
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}
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/**
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\brief LDRT Unprivileged (8 bit)
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\details Executes a Unprivileged LDRT instruction for 8 bit value.
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\param [in] ptr Pointer to data
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\return value of type uint8_t at (*ptr)
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*/
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__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
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{
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uint32_t result;
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__ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
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return ((uint8_t)result); /* Add explicit type cast here */
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}
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/**
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\brief LDRT Unprivileged (16 bit)
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\details Executes a Unprivileged LDRT instruction for 16 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint16_t at (*ptr)
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*/
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__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
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{
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uint32_t result;
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__ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
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return ((uint16_t)result); /* Add explicit type cast here */
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}
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/**
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\brief LDRT Unprivileged (32 bit)
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\details Executes a Unprivileged LDRT instruction for 32 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint32_t at (*ptr)
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*/
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__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
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{
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uint32_t result;
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__ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
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return (result);
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}
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#endif /* (__ARM_ARCH_ISA_THUMB >= 2) */
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#if (__ARM_ARCH >= 8)
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/**
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\brief Load-Acquire (8 bit)
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\details Executes a LDAB instruction for 8 bit value.
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\param [in] ptr Pointer to data
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\return value of type uint8_t at (*ptr)
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*/
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__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
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{
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uint32_t result;
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__ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
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return ((uint8_t)result); /* Add explicit type cast here */
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}
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/**
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\brief Load-Acquire (16 bit)
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\details Executes a LDAH instruction for 16 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint16_t at (*ptr)
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*/
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__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
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{
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uint32_t result;
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__ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
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return ((uint16_t)result); /* Add explicit type cast here */
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}
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/**
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\brief Load-Acquire (32 bit)
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\details Executes a LDA instruction for 32 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint32_t at (*ptr)
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*/
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__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
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{
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uint32_t result;
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__ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
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return (result);
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}
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/**
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\brief Store-Release (8 bit)
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\details Executes a STLB instruction for 8 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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*/
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__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
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{
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__ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
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}
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/**
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\brief Store-Release (16 bit)
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\details Executes a STLH instruction for 16 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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*/
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__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
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{
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__ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
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}
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/**
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\brief Store-Release (32 bit)
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\details Executes a STL instruction for 32 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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*/
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__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
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{
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__ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
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}
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/**
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\brief Load-Acquire Exclusive (8 bit)
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\details Executes a LDAB exclusive instruction for 8 bit value.
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\param [in] ptr Pointer to data
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\return value of type uint8_t at (*ptr)
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*/
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#define __LDAEXB (uint8_t)__builtin_arm_ldaex
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/**
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\brief Load-Acquire Exclusive (16 bit)
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\details Executes a LDAH exclusive instruction for 16 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint16_t at (*ptr)
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*/
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#define __LDAEXH (uint16_t)__builtin_arm_ldaex
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/**
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\brief Load-Acquire Exclusive (32 bit)
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\details Executes a LDA exclusive instruction for 32 bit values.
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\param [in] ptr Pointer to data
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\return value of type uint32_t at (*ptr)
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*/
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#define __LDAEX (uint32_t)__builtin_arm_ldaex
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/**
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\brief Store-Release Exclusive (8 bit)
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\details Executes a STLB exclusive instruction for 8 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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\return 0 Function succeeded
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\return 1 Function failed
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*/
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#define __STLEXB (uint32_t)__builtin_arm_stlex
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/**
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\brief Store-Release Exclusive (16 bit)
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\details Executes a STLH exclusive instruction for 16 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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\return 0 Function succeeded
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\return 1 Function failed
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*/
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#define __STLEXH (uint32_t)__builtin_arm_stlex
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/**
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\brief Store-Release Exclusive (32 bit)
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\details Executes a STL exclusive instruction for 32 bit values.
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\param [in] value Value to store
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\param [in] ptr Pointer to location
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\return 0 Function succeeded
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\return 1 Function failed
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*/
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#define __STLEX (uint32_t)__builtin_arm_stlex
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#endif /* (__ARM_ARCH >= 8) */
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/** @}*/ /* end of group CMSIS_Core_InstructionInterface */
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/* ########################### Core Function Access ########################### */
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/** \ingroup CMSIS_Core_FunctionInterface
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\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
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@{
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*/
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/**
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\brief Enable IRQ Interrupts
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\details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
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Can only be executed in Privileged modes.
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*/
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__STATIC_FORCEINLINE void __enable_irq(void)
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{
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__ASM volatile ("cpsie i" : : : "memory");
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}
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/**
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\brief Disable IRQ Interrupts
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\details Disables IRQ interrupts by setting special-purpose register PRIMASK.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __disable_irq(void)
|
|
{
|
|
__ASM volatile ("cpsid i" : : : "memory");
|
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}
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|
|
#if (__ARM_ARCH_ISA_THUMB >= 2)
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/**
|
|
\brief Enable FIQ
|
|
\details Enables FIQ interrupts by clearing special-purpose register FAULTMASK.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __enable_fault_irq(void)
|
|
{
|
|
__ASM volatile ("cpsie f" : : : "memory");
|
|
}
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|
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|
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/**
|
|
\brief Disable FIQ
|
|
\details Disables FIQ interrupts by setting special-purpose register FAULTMASK.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __disable_fault_irq(void)
|
|
{
|
|
__ASM volatile ("cpsid f" : : : "memory");
|
|
}
|
|
#endif
|
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|
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|
|
/**
|
|
\brief Get FPSCR
|
|
\details Returns the current value of the Floating Point Status/Control register.
|
|
\return Floating Point Status/Control register value
|
|
*/
|
|
__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
|
|
{
|
|
#if (defined(__ARM_FP) && (__ARM_FP >= 1))
|
|
return (__builtin_arm_get_fpscr());
|
|
#else
|
|
return (0U);
|
|
#endif
|
|
}
|
|
|
|
|
|
/**
|
|
\brief Set FPSCR
|
|
\details Assigns the given value to the Floating Point Status/Control register.
|
|
\param [in] fpscr Floating Point Status/Control value to set
|
|
*/
|
|
__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
|
|
{
|
|
#if (defined(__ARM_FP) && (__ARM_FP >= 1))
|
|
__builtin_arm_set_fpscr(fpscr);
|
|
#else
|
|
(void)fpscr;
|
|
#endif
|
|
}
|
|
|
|
/** @} end of CMSIS_Core_RegAccFunctions */
|
|
|
|
// Include the profile specific settings:
|
|
#if __ARM_ARCH_PROFILE == 'A'
|
|
#include "./a-profile/cmsis_clang_a.h"
|
|
#elif __ARM_ARCH_PROFILE == 'R'
|
|
#include "./r-profile/cmsis_clang_r.h"
|
|
#elif __ARM_ARCH_PROFILE == 'M'
|
|
#include "./m-profile/cmsis_clang_m.h"
|
|
#else
|
|
#error "Unknown Arm architecture profile"
|
|
#endif
|
|
|
|
#endif /* __CMSIS_CLANG_H */
|