generated from hulk/gd32e23x_template_cmake_vscode
add Hardware IIC
This commit is contained in:
@@ -29,6 +29,7 @@ set(TARGET_SRC
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Src/led.c
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Src/uart_ring_buffer.c
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Src/command.c
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Src/i2c.c
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)
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# 设置输出目录
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@@ -26,6 +26,8 @@
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#define I2C_SDA_PIN GPIO_PIN_0
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#define I2C_GPIO_AF GPIO_AF_1
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#define I2C_DEBUG_UART USART0
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/******************************************************************************/
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#define LED_PORT GPIOA
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98
Inc/i2c.h
98
Inc/i2c.h
@@ -8,7 +8,6 @@
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#include "gd32e23x_it.h"
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#include "gd32e23x.h"
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#include "systick.h"
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#include "main.h"
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#include <stdbool.h>
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#include <string.h>
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#include <stdio.h>
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@@ -19,15 +18,45 @@
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/******************************************************************************/
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#define I2C_SPEED 100*(1000)
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#define I2C_SPEED 100000U /* 100kHz */
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#define I2C_TIME_OUT 5000U /* 5000 loops timeout */
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#define I2C_MAX_RETRY 3U /* Maximum retry attempts */
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#define I2C_DELAY_10US 10U /* Delay in microseconds for bus reset */
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#define I2C_RECOVERY_CLOCKS 9U /* Clock pulses for bus recovery */
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#define I2C_MASTER_ADDRESS 0x00U /* Master address (not used) */
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#define I2C_TIME_OUT (uint16_t)(5000)
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#define I2C_OK 1
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#define I2C_FAIL 0
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#define I2C_END 1
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/* Legacy compatibility */
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#define I2C_OK 1
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#define I2C_FAIL 0
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#define I2C_END 1
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/******************************************************************************/
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/* I2C status enumeration */
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typedef enum {
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I2C_STATUS_SUCCESS = 0, /* Operation successful */
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I2C_STATUS_TIMEOUT, /* Timeout occurred */
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I2C_STATUS_NACK, /* No acknowledge received */
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I2C_STATUS_BUS_BUSY, /* Bus is busy */
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I2C_STATUS_ERROR, /* General error */
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I2C_STATUS_INVALID_PARAM /* Invalid parameter */
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} i2c_status_t;
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/* I2C state machine enumeration */
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typedef enum {
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I2C_STATE_IDLE = 0, /* Idle state */
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I2C_STATE_START, /* Generate start condition */
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I2C_STATE_SEND_ADDRESS, /* Send slave address */
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I2C_STATE_CLEAR_ADDRESS, /* Clear address flag */
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I2C_STATE_TRANSMIT_REG, /* Transmit register address */
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I2C_STATE_TRANSMIT_DATA, /* Transmit data */
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I2C_STATE_RESTART, /* Generate restart condition */
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I2C_STATE_RECEIVE_DATA, /* Receive data */
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I2C_STATE_STOP, /* Generate stop condition */
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I2C_STATE_ERROR /* Error state */
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} i2c_state_t;
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/* Legacy enumeration for compatibility */
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typedef enum {
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I2C_START = 0,
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I2C_SEND_ADDRESS,
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@@ -38,16 +67,65 @@ typedef enum {
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/******************************************************************************/
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/* Function declarations */
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/*!
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\brief configure the GPIO ports for I2C
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\param[in] none
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\param[out] none
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\retval none
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*/
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void i2c_gpio_config(void);
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void i2c_config(void);
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/*!
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\brief configure the I2C interface
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\param[in] none
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\param[out] none
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\retval i2c_status_t
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*/
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i2c_status_t i2c_config(void);
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void i2c_bus_reset(void);
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/*!
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\brief reset I2C bus with proper recovery
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\param[in] none
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\param[out] none
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\retval i2c_status_t
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*/
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i2c_status_t i2c_bus_reset(void);
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/*!
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\brief scan I2C bus for devices
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\param[in] none
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\param[out] none
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\retval none
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*/
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void i2c_scan(void);
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uint8_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]);
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/*!
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\brief write 16-bit data to I2C device
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\param[in] slave_addr: 7-bit slave address
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\param[in] reg_addr: register address
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\param[in] data: pointer to 2-byte data array
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\param[out] none
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\retval i2c_status_t
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*/
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i2c_status_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, const uint8_t data[2]);
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uint8_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data);
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/*!
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\brief read 16-bit data from I2C device
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\param[in] slave_addr: 7-bit slave address
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\param[in] reg_addr: register address
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\param[out] data: pointer to 2-byte data buffer
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\retval i2c_status_t
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*/
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i2c_status_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data);
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/*!
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\brief get status string for debugging
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\param[in] status: i2c_status_t value
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\param[out] none
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\retval const char* status string
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*/
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const char* i2c_get_status_string(i2c_status_t status);
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#endif //I2C_H
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737
Src/i2c.c
737
Src/i2c.c
@@ -1,9 +1,13 @@
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//
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// Created by dell on 24-12-20.
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// Improved I2C driver with better state machine and error handling
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//
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#include "i2c.h"
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/* Private variables */
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static uint8_t i2c_retry_count = 0;
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/*!
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\brief configure the GPIO ports
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\param[in] none
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@@ -29,54 +33,81 @@ void i2c_gpio_config(void) {
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\brief configure the I2CX interface
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\param[in] none
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\param[out] none
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\retval none
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\retval i2c_status_t
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*/
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void i2c_config(void) {
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i2c_status_t i2c_config(void) {
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/* configure I2C GPIO */
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i2c_gpio_config();
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/* enable I2C clock */
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rcu_periph_clock_enable(RCU_I2C);
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/* configure I2C clock */
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i2c_clock_config(I2C0, I2C_SPEED, I2C_DTCY_2);
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/* configure I2C address */
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i2c_mode_addr_config(I2C0, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, 0xA0);
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/* configure I2C address - use 0x00 as master doesn't need specific address */
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i2c_mode_addr_config(I2C0, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, I2C_MASTER_ADDRESS);
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/* enable I2CX */
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i2c_enable(I2C0);
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/* enable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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/* reset retry counter */
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i2c_retry_count = 0;
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return I2C_STATUS_SUCCESS;
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}
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/*!
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\brief reset I2C bus
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\brief reset I2C bus with proper 9-clock recovery
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\param[in] none
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\param[out] none
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\retval none
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\retval i2c_status_t
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*/
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void i2c_bus_reset(void) {
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i2c_status_t i2c_bus_reset(void) {
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uint8_t i;
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/* disable I2C peripheral */
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i2c_disable(I2C0);
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i2c_deinit(I2C0);
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/* configure SDA/SCL for GPIO */
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GPIO_BC(I2C_SCL_PORT) |= I2C_SCL_PIN;
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GPIO_BC(I2C_SDA_PORT) |= I2C_SDA_PIN;
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gpio_output_options_set(I2C_SCL_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, I2C_SCL_PIN);
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gpio_output_options_set(I2C_SDA_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, I2C_SDA_PIN);
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__NOP();
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__NOP();
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__NOP();
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__NOP();
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__NOP();
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GPIO_BOP(I2C_SCL_PORT) |= I2C_SCL_PIN;
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__NOP();
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__NOP();
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__NOP();
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__NOP();
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__NOP();
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GPIO_BOP(I2C_SDA_PORT) |= I2C_SDA_PIN;
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/* connect I2C_SCL_PIN to I2C_SCL */
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/* connect I2C_SDA_PIN to I2C_SDA */
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/* configure SDA/SCL as GPIO output for manual control */
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gpio_mode_set(I2C_SCL_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, I2C_SCL_PIN);
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gpio_mode_set(I2C_SDA_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, I2C_SDA_PIN);
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gpio_output_options_set(I2C_SCL_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SCL_PIN);
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gpio_output_options_set(I2C_SDA_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SDA_PIN);
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/* configure the I2CX interface */
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i2c_config();
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/* ensure both lines are high initially */
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gpio_bit_set(I2C_SCL_PORT, I2C_SCL_PIN);
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gpio_bit_set(I2C_SDA_PORT, I2C_SDA_PIN);
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delay_10us(I2C_DELAY_10US);
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/* generate 9 clock pulses to release any stuck slave */
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for (i = 0; i < I2C_RECOVERY_CLOCKS; i++) {
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gpio_bit_reset(I2C_SCL_PORT, I2C_SCL_PIN);
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delay_10us(I2C_DELAY_10US);
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gpio_bit_set(I2C_SCL_PORT, I2C_SCL_PIN);
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delay_10us(I2C_DELAY_10US);
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}
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/* generate stop condition */
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gpio_bit_reset(I2C_SDA_PORT, I2C_SDA_PIN);
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delay_10us(I2C_DELAY_10US);
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gpio_bit_set(I2C_SCL_PORT, I2C_SCL_PIN);
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delay_10us(I2C_DELAY_10US);
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gpio_bit_set(I2C_SDA_PORT, I2C_SDA_PIN);
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delay_10us(I2C_DELAY_10US);
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/* reconfigure as I2C pins */
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gpio_af_set(I2C_SCL_PORT, I2C_GPIO_AF, I2C_SCL_PIN);
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gpio_af_set(I2C_SDA_PORT, I2C_GPIO_AF, I2C_SDA_PIN);
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gpio_mode_set(I2C_SCL_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, I2C_SCL_PIN);
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gpio_mode_set(I2C_SDA_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, I2C_SDA_PIN);
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/* reconfigure the I2CX interface */
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return i2c_config();
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}
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/**
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@@ -91,7 +122,13 @@ void i2c_scan(void) {
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uint8_t address;
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int found_devices = 0;
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printf("Scanning I2C bus...\r\n");
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// printf("Scanning I2C bus...\r\n");
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const char* msg1 = "Scanning I2C bus...\r\n";
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for (uint8_t i = 0; msg1[i] != '\0'; i++) {
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, msg1[i]);
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}
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
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for (address = 1; address < 127; address++) {
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timeout = 0;
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@@ -119,7 +156,24 @@ void i2c_scan(void) {
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timeout++;
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if (timeout < I2C_TIME_OUT) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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printf("Found device at 0x%02X\r\n", address);
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// printf("Found device at 0x%02X\r\n", address);
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const char* msg2_prefix = "Found device at 0x";
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for (uint8_t i = 0; msg2_prefix[i] != '\0'; i++) {
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, msg2_prefix[i]);
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}
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// 发送地址的十六进制表示
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uint8_t hex_chars[] = "0123456789ABCDEF";
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, hex_chars[(address >> 4) & 0x0F]);
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, hex_chars[address & 0x0F]);
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const char* msg2_suffix = "\r\n";
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for (uint8_t i = 0; msg2_suffix[i] != '\0'; i++) {
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, msg2_suffix[i]);
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}
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
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found_devices++;
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}
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@@ -133,344 +187,453 @@ void i2c_scan(void) {
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}
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if (found_devices == 0) {
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printf("No I2C devices found.\r\n");
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// printf("No I2C devices found.\r\n");
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const char* msg3 = "No I2C devices found.\r\n";
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for (uint8_t i = 0; msg3[i] != '\0'; i++) {
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, msg3[i]);
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}
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
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} else {
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printf("Total %d I2C devices found.\r\n", found_devices);
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// printf("Total %d I2C devices found.\r\n", found_devices);
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const char* msg4_prefix = "Total ";
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for (uint8_t i = 0; msg4_prefix[i] != '\0'; i++) {
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, msg4_prefix[i]);
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}
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// 发送设备数量
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if (found_devices >= 10) {
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, '0' + (found_devices / 10));
|
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}
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, '0' + (found_devices % 10));
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const char* msg4_suffix = " I2C devices found.\r\n";
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for (uint8_t i = 0; msg4_suffix[i] != '\0'; i++) {
|
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
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usart_data_transmit(I2C_DEBUG_UART, msg4_suffix[i]);
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}
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
|
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}
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}
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uint8_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]) {
|
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uint8_t state = I2C_START;
|
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/*!
|
||||
\brief write 16-bit data to I2C device with improved state machine
|
||||
\param[in] slave_addr: 7-bit slave address
|
||||
\param[in] reg_addr: register address
|
||||
\param[in] data: pointer to 2-byte data array
|
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\param[out] none
|
||||
\retval i2c_status_t
|
||||
*/
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i2c_status_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, const uint8_t data[2]) {
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i2c_state_t state = I2C_STATE_START;
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uint16_t timeout = 0;
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uint8_t i2c_timeout_flag = 0;
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uint8_t data_index = 0;
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uint8_t retry_count = 0;
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/* enable acknowledge */
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/* Parameter validation */
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if (data == NULL || slave_addr > 0x7F) {
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return I2C_STATUS_INVALID_PARAM;
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}
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/* Enable acknowledge */
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||||
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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while (!(i2c_timeout_flag)) {
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while (retry_count < I2C_MAX_RETRY) {
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switch (state) {
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case I2C_START:
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/* i2c master sends start signal only when the bus is idle */
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case I2C_STATE_START:
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timeout = 0;
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||||
/* Wait for bus to be idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
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timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
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i2c_start_on_bus(I2C0);
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timeout = 0;
|
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state = I2C_SEND_ADDRESS;
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} else {
|
||||
timeout = 0;
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||||
state = I2C_START;
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||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c bus is busy in WRITE BYTE!\n");
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||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
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||||
break;
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||||
}
|
||||
|
||||
/* Send start condition */
|
||||
i2c_start_on_bus(I2C0);
|
||||
state = I2C_STATE_SEND_ADDRESS;
|
||||
timeout = 0;
|
||||
break;
|
||||
case I2C_SEND_ADDRESS:
|
||||
/* i2c master sends START signal successfully */
|
||||
|
||||
case I2C_STATE_SEND_ADDRESS:
|
||||
/* Wait for start condition to be sent */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
i2c_master_addressing(I2C0, slave_addr, I2C_TRANSMITTER);
|
||||
timeout = 0;
|
||||
state = I2C_CLEAR_ADDRESS_FLAG;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends start signal timeout in WRITE BYTE!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Send slave address with write bit */
|
||||
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_TRANSMITTER);
|
||||
state = I2C_STATE_CLEAR_ADDRESS;
|
||||
timeout = 0;
|
||||
break;
|
||||
case I2C_CLEAR_ADDRESS_FLAG:
|
||||
/* address flag set means i2c slave sends ACK */
|
||||
|
||||
case I2C_STATE_CLEAR_ADDRESS:
|
||||
/* Wait for address to be acknowledged */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||
timeout = 0;
|
||||
state = I2C_TRANSMIT_DATA;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master clears address flag timeout in WRITE BYTE!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Clear address flag */
|
||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||
state = I2C_STATE_TRANSMIT_REG;
|
||||
timeout = 0;
|
||||
break;
|
||||
case I2C_TRANSMIT_DATA:
|
||||
/* wait until the transmit data buffer is empty */
|
||||
|
||||
case I2C_STATE_TRANSMIT_REG:
|
||||
/* Wait for transmit buffer to be empty */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
/* send IIC register address */
|
||||
i2c_data_transmit(I2C0, reg_addr);
|
||||
timeout = 0;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends data timeout in WRITE BYTE!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* wait until BTC bit is set */
|
||||
/* Send register address */
|
||||
i2c_data_transmit(I2C0, reg_addr);
|
||||
state = I2C_STATE_TRANSMIT_DATA;
|
||||
timeout = 0;
|
||||
data_index = 0;
|
||||
break;
|
||||
|
||||
case I2C_STATE_TRANSMIT_DATA:
|
||||
/* Wait for byte transfer complete */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
/* send register MSB value */
|
||||
i2c_data_transmit(I2C0, data[0]);
|
||||
timeout = 0;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends MSB data timeout in WRITE BYTE!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* wait until BTC bit is set */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
/* send register LSB value */
|
||||
i2c_data_transmit(I2C0, data[1]);
|
||||
/* Send data bytes */
|
||||
if (data_index < 2) {
|
||||
i2c_data_transmit(I2C0, data[data_index]);
|
||||
data_index++;
|
||||
timeout = 0;
|
||||
state = I2C_STOP;
|
||||
/* Stay in this state until all data is sent */
|
||||
} else {
|
||||
/* All data sent, proceed to stop */
|
||||
state = I2C_STATE_STOP;
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends LSB data timeout in WRITE BYTE!\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
/* wait until BTC bit is set */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
state = I2C_STOP;
|
||||
timeout = 0;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends data timeout in WRITE BYTE!\n");
|
||||
#endif
|
||||
}
|
||||
break;
|
||||
case I2C_STOP:
|
||||
/* send a stop condition to I2C bus */
|
||||
|
||||
case I2C_STATE_STOP:
|
||||
/* Send stop condition */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
/* i2c master sends STOP signal successfully */
|
||||
|
||||
/* Wait for stop condition to complete */
|
||||
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
timeout = 0;
|
||||
state = I2C_END;
|
||||
i2c_timeout_flag = I2C_OK;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends stop signal timeout in WRITE BYTE!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
state = I2C_START;
|
||||
i2c_timeout_flag = I2C_OK;
|
||||
timeout = 0;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends start signal in WRITE BYTE.\n");
|
||||
|
||||
/* Success */
|
||||
return I2C_STATUS_SUCCESS;
|
||||
|
||||
case I2C_STATE_ERROR:
|
||||
/* Send stop condition to release bus */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
|
||||
/* Increment retry counter */
|
||||
retry_count++;
|
||||
if (retry_count >= I2C_MAX_RETRY) {
|
||||
#ifdef DEBUG_VERBOSE
|
||||
// printf("I2C write failed after %d retries\r\n", I2C_MAX_RETRY);
|
||||
const char* msg5_prefix = "I2C write failed after ";
|
||||
for (uint8_t i = 0; msg5_prefix[i] != '\0'; i++) {
|
||||
while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
|
||||
usart_data_transmit(I2C_DEBUG_UART, msg5_prefix[i]);
|
||||
}
|
||||
while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
|
||||
usart_data_transmit(I2C_DEBUG_UART, '0' + I2C_MAX_RETRY);
|
||||
const char* msg5_suffix = " retries\r\n";
|
||||
for (uint8_t i = 0; msg5_suffix[i] != '\0'; i++) {
|
||||
while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
|
||||
usart_data_transmit(I2C_DEBUG_UART, msg5_suffix[i]);
|
||||
}
|
||||
while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
|
||||
#endif
|
||||
return I2C_STATUS_TIMEOUT;
|
||||
}
|
||||
|
||||
/* Reset state machine for retry */
|
||||
state = I2C_STATE_START;
|
||||
timeout = 0;
|
||||
data_index = 0;
|
||||
|
||||
/* Small delay before retry */
|
||||
delay_10us(10);
|
||||
break;
|
||||
|
||||
default:
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
return I2C_END;
|
||||
|
||||
return I2C_STATUS_TIMEOUT;
|
||||
}
|
||||
|
||||
uint8_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data) {
|
||||
uint8_t state = I2C_START;
|
||||
uint8_t read_cycle = 0;
|
||||
/*!
|
||||
\brief read 16-bit data from I2C device with improved state machine
|
||||
\param[in] slave_addr: 7-bit slave address
|
||||
\param[in] reg_addr: register address
|
||||
\param[out] data: pointer to 2-byte data buffer
|
||||
\retval i2c_status_t
|
||||
*/
|
||||
i2c_status_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data) {
|
||||
i2c_state_t state = I2C_STATE_START;
|
||||
uint16_t timeout = 0;
|
||||
uint8_t i2c_timeout_flag = 0;
|
||||
uint8_t number_of_byte = 2;
|
||||
uint8_t data_index = 0;
|
||||
uint8_t retry_count = 0;
|
||||
bool write_phase = true; /* First phase: write register address */
|
||||
|
||||
/* enable acknowledge */
|
||||
/* Parameter validation */
|
||||
if (data == NULL || slave_addr > 0x7F) {
|
||||
return I2C_STATUS_INVALID_PARAM;
|
||||
}
|
||||
|
||||
/* Enable acknowledge */
|
||||
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||
|
||||
while (!(i2c_timeout_flag)) {
|
||||
while (retry_count < I2C_MAX_RETRY) {
|
||||
switch (state) {
|
||||
case I2C_START:
|
||||
if (RESET == read_cycle) {
|
||||
/* i2c master sends start signal only when the bus is idle */
|
||||
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
/* whether to send ACK or not for the next byte */
|
||||
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
||||
} else {
|
||||
// i2c_bus_reset();
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c bus is busy in READ!\n");
|
||||
#endif
|
||||
}
|
||||
}
|
||||
/* send the start signal */
|
||||
i2c_start_on_bus(I2C0);
|
||||
case I2C_STATE_START:
|
||||
timeout = 0;
|
||||
/* Wait for bus to be idle */
|
||||
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Configure ACK position for 2-byte read */
|
||||
if (!write_phase) {
|
||||
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
||||
}
|
||||
|
||||
/* Send start condition */
|
||||
i2c_start_on_bus(I2C0);
|
||||
state = I2C_STATE_SEND_ADDRESS;
|
||||
timeout = 0;
|
||||
state = I2C_SEND_ADDRESS;
|
||||
break;
|
||||
case I2C_SEND_ADDRESS:
|
||||
/* i2c master sends START signal successfully */
|
||||
|
||||
case I2C_STATE_SEND_ADDRESS:
|
||||
/* Wait for start condition to be sent */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
if (RESET == read_cycle) {
|
||||
i2c_master_addressing(I2C0, slave_addr, I2C_TRANSMITTER);
|
||||
state = I2C_CLEAR_ADDRESS_FLAG;
|
||||
} else {
|
||||
i2c_master_addressing(I2C0, slave_addr, I2C_RECEIVER);
|
||||
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||
state = I2C_CLEAR_ADDRESS_FLAG;
|
||||
}
|
||||
timeout = 0;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
read_cycle = RESET;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends start signal timeout in READ!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Send slave address */
|
||||
if (write_phase) {
|
||||
/* Write phase: send address with write bit */
|
||||
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_TRANSMITTER);
|
||||
} else {
|
||||
/* Read phase: send address with read bit */
|
||||
i2c_master_addressing(I2C0, (slave_addr << 1) | 0x01, I2C_RECEIVER);
|
||||
/* Disable ACK for last byte */
|
||||
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||
}
|
||||
state = I2C_STATE_CLEAR_ADDRESS;
|
||||
timeout = 0;
|
||||
break;
|
||||
case I2C_CLEAR_ADDRESS_FLAG:
|
||||
/* address flag set means i2c slave sends ACK */
|
||||
|
||||
case I2C_STATE_CLEAR_ADDRESS:
|
||||
/* Wait for address to be acknowledged */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||
if ((SET == read_cycle) && (1 == number_of_byte)) {
|
||||
/* send a stop condition to I2C bus */
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Clear address flag */
|
||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||
|
||||
if (write_phase) {
|
||||
state = I2C_STATE_TRANSMIT_REG;
|
||||
} else {
|
||||
/* For single byte read, send stop after clearing address */
|
||||
if (data_index == 1) {
|
||||
i2c_stop_on_bus(I2C0);
|
||||
}
|
||||
timeout = 0;
|
||||
state = I2C_TRANSMIT_DATA;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
read_cycle = RESET;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master clears address flag timeout in READ!\n");
|
||||
#endif
|
||||
state = I2C_STATE_RECEIVE_DATA;
|
||||
data_index = 0;
|
||||
}
|
||||
timeout = 0;
|
||||
break;
|
||||
case I2C_TRANSMIT_DATA:
|
||||
if (RESET == read_cycle) {
|
||||
/* wait until the transmit data buffer is empty */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
||||
|
||||
case I2C_STATE_TRANSMIT_REG:
|
||||
/* Wait for transmit buffer to be empty */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Send register address */
|
||||
i2c_data_transmit(I2C0, reg_addr);
|
||||
state = I2C_STATE_RESTART;
|
||||
timeout = 0;
|
||||
break;
|
||||
|
||||
case I2C_STATE_RESTART:
|
||||
/* Wait for byte transfer complete */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Switch to read phase */
|
||||
write_phase = false;
|
||||
state = I2C_STATE_START;
|
||||
timeout = 0;
|
||||
break;
|
||||
|
||||
case I2C_STATE_RECEIVE_DATA:
|
||||
if (data_index < 2) {
|
||||
if (data_index == 1) {
|
||||
/* Wait for BTC before sending stop for last byte */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
/* Send stop condition before reading last byte */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
}
|
||||
|
||||
/* Wait for receive buffer not empty */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
/* send the EEPROM's internal address to write to : only one byte address */
|
||||
i2c_data_transmit(I2C0, reg_addr);
|
||||
timeout = 0;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
read_cycle = RESET;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master wait data buffer is empty timeout in READ!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
/* wait until BTC bit is set */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
read_cycle = SET;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
read_cycle = RESET;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends register address timeout in READ!\n");
|
||||
#endif
|
||||
|
||||
/* Read data byte */
|
||||
data[data_index] = i2c_data_receive(I2C0);
|
||||
data_index++;
|
||||
timeout = 0;
|
||||
|
||||
if (data_index >= 2) {
|
||||
state = I2C_STATE_STOP;
|
||||
}
|
||||
} else {
|
||||
while (number_of_byte) {
|
||||
timeout++;
|
||||
if (2 == number_of_byte) {
|
||||
/* wait until BTC bit is set */
|
||||
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC));
|
||||
/* send a stop condition to I2C bus */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
}
|
||||
/* wait until RBNE bit is set */
|
||||
if (i2c_flag_get(I2C0, I2C_FLAG_RBNE)) {
|
||||
/* read a byte from the EEPROM */
|
||||
*data = i2c_data_receive(I2C0);
|
||||
/* point to the next location where the byte read will be saved */
|
||||
data++;
|
||||
/* decrement the read bytes counter */
|
||||
number_of_byte--;
|
||||
timeout = 0;
|
||||
}
|
||||
if (timeout > I2C_TIME_OUT) {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
read_cycle = 0;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends data timeout in READ!\n");
|
||||
#endif
|
||||
}
|
||||
}
|
||||
timeout = 0;
|
||||
state = I2C_STOP;
|
||||
state = I2C_STATE_STOP;
|
||||
}
|
||||
break;
|
||||
case I2C_STOP:
|
||||
/* i2c master sends STOP signal successfully */
|
||||
|
||||
case I2C_STATE_STOP:
|
||||
/* Wait for stop condition to complete */
|
||||
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
timeout = 0;
|
||||
state = I2C_END;
|
||||
i2c_timeout_flag = I2C_OK;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_START;
|
||||
read_cycle = 0;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends stop signal timeout in READ!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
state = I2C_START;
|
||||
read_cycle = 0;
|
||||
i2c_timeout_flag = I2C_OK;
|
||||
timeout = 0;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends start signal in READ.\n");
|
||||
|
||||
/* Success */
|
||||
return I2C_STATUS_SUCCESS;
|
||||
|
||||
case I2C_STATE_ERROR:
|
||||
/* Send stop condition to release bus */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
|
||||
/* Increment retry counter */
|
||||
retry_count++;
|
||||
if (retry_count >= I2C_MAX_RETRY) {
|
||||
#ifdef DEBUG_VERBOSE
|
||||
// printf("I2C read failed after %d retries\r\n", I2C_MAX_RETRY);
|
||||
const char* msg6_prefix = "I2C read failed after ";
|
||||
for (uint8_t i = 0; msg6_prefix[i] != '\0'; i++) {
|
||||
while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
|
||||
usart_data_transmit(I2C_DEBUG_UART, msg6_prefix[i]);
|
||||
}
|
||||
while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
|
||||
usart_data_transmit(I2C_DEBUG_UART, '0' + I2C_MAX_RETRY);
|
||||
const char* msg6_suffix = " retries\r\n";
|
||||
for (uint8_t i = 0; msg6_suffix[i] != '\0'; i++) {
|
||||
while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TBE) == RESET) {}
|
||||
usart_data_transmit(I2C_DEBUG_UART, msg6_suffix[i]);
|
||||
}
|
||||
while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
|
||||
#endif
|
||||
return I2C_STATUS_TIMEOUT;
|
||||
}
|
||||
|
||||
/* Reset state machine for retry */
|
||||
state = I2C_STATE_START;
|
||||
write_phase = true;
|
||||
timeout = 0;
|
||||
data_index = 0;
|
||||
|
||||
/* Small delay before retry */
|
||||
delay_10us(10);
|
||||
break;
|
||||
|
||||
default:
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
return I2C_END;
|
||||
|
||||
return I2C_STATUS_TIMEOUT;
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get status string for debugging
|
||||
\param[in] status: i2c_status_t value
|
||||
\param[out] none
|
||||
\retval const char* status string
|
||||
*/
|
||||
const char* i2c_get_status_string(i2c_status_t status) {
|
||||
switch (status) {
|
||||
case I2C_STATUS_SUCCESS:
|
||||
return "SUCCESS";
|
||||
case I2C_STATUS_TIMEOUT:
|
||||
return "TIMEOUT";
|
||||
case I2C_STATUS_NACK:
|
||||
return "NACK";
|
||||
case I2C_STATUS_BUS_BUSY:
|
||||
return "BUS_BUSY";
|
||||
case I2C_STATUS_ERROR:
|
||||
return "ERROR";
|
||||
case I2C_STATUS_INVALID_PARAM:
|
||||
return "INVALID_PARAM";
|
||||
default:
|
||||
return "UNKNOWN";
|
||||
}
|
||||
}
|
||||
|
Reference in New Issue
Block a user