generated from hulk/gd32e23x_template
47 lines
970 B
C
47 lines
970 B
C
//
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// Created by yelv1 on 24-12-29.
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//
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#include "fwdgt.h"
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/**
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* @brief Initialize the watchdog
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* @param None
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* @retval None
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*/
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void watchdog_init(void) {
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/* Enable the LSI clock */
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rcu_osci_on(RCU_IRC40K);
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rcu_osci_stab_wait(RCU_IRC40K);
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/* Configure FWDGT counter clock: 40KHz(IRC40K) / 64 = 0.625 KHz */
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fwdgt_config(625, FWDGT_PSC_DIV64); // Set timeout to 1 seconds (625 / 0.625 KHz)
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/* Enable FWDGT */
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fwdgt_enable();
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}
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/**
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* @brief Reset the MCU
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* @param None
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* @retval None
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*/
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void fwdgt_reset_mcu(void) {
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/* Enable the write access to the FWDGT_CTL register */
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FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
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/* Configure FWDGT to trigger a system reset */
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fwdgt_config(50, FWDGT_PSC_DIV4);
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/* Reload the counter to trigger the reset */
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fwdgt_counter_reload();
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}
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/**
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* @brief Reload the watchdog counter
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* @param None
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* @retval None
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*/
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void watchdog_reload(void) {
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fwdgt_counter_reload();
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} |