From 9a07dba591ae5c57e018a5f0292e970dfccdaa52 Mon Sep 17 00:00:00 2001
From: yelvlab <wanghao19950516@gmail.com>
Date: Thu, 26 Dec 2024 01:11:26 +0800
Subject: [PATCH] =?UTF-8?q?=E6=B7=BB=E5=8A=A0=E7=8B=AC=E7=AB=8B=E7=A1=AC?=
 =?UTF-8?q?=E4=BB=B6=E5=BC=80=E9=97=A8=E7=8B=97?=
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---
 inc/main.h |  2 ++
 src/main.c | 21 ++++++++++++++++++++-
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/inc/main.h b/inc/main.h
index c4882be..c79017e 100644
--- a/inc/main.h
+++ b/inc/main.h
@@ -37,4 +37,6 @@ OF SUCH DAMAGE.
 
 // #define DEBUG_VERBOES
 
+void watchdog_init(void);
+
 #endif /* MAIN_H */
diff --git a/src/main.c b/src/main.c
index 6d9db53..0e13bfe 100644
--- a/src/main.c
+++ b/src/main.c
@@ -18,6 +18,21 @@
 uint32_t g_temperature_uint32;
 uint32_t g_eddy_current_value_uint32;
 
+void watchdog_init(void) {
+    /* Enable the LSI clock */
+    rcu_osci_on(RCU_IRC40K);
+    rcu_osci_stab_wait(RCU_IRC40K);
+
+    /* Enable the FWDGT clock */
+    // rcu_periph_clock_enable(RCU_FWDGT);
+
+    /* Configure FWDGT counter clock: 40KHz(IRC40K) / 256 = 0.15625 KHz */
+    fwdgt_config(625, FWDGT_PSC_DIV256); // Set timeout to 4 seconds (625 / 0.15625 KHz)
+
+    /* Enable FWDGT */
+    fwdgt_enable();
+}
+
 /*!
     \brief      main function
     \param[in]  none
@@ -40,13 +55,17 @@ int main(void) {
     /* configure LDC1612 */
     ldc1612_single_ch0_config();
 
+    /* Initialize watchdog */
+    watchdog_init();
+
     while (1) {
-        delay_ms(100);
+        delay_ms(99);
         g_eddy_current_value_uint32 = 0;
         g_temperature_uint32 = 0;
         g_eddy_current_value_uint32 = ldc1612_get_raw_channel_result(CHANNEL_0);
         g_temperature_uint32 = tmp112a_get_raw_channel_result();
         // printf("1");
+        fwdgt_counter_reload();
     }
 }