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b24c0853c9
| Author | SHA1 | Date | |
|---|---|---|---|
| b24c0853c9 | |||
| 77a6525168 | |||
| 6cc7b2dae2 |
6
.vscode/tasks.json
vendored
6
.vscode/tasks.json
vendored
@@ -11,7 +11,11 @@
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"Build",
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"Flash MCU"
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],
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"dependsOrder": "sequence"
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"dependsOrder": "sequence",
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"icon": {
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"id": "play",
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"tooltip": "Build and Flash"
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}
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},
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{
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"label": "Flash MCU",
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534
Src/i2c.c
534
Src/i2c.c
@@ -156,7 +156,6 @@ i2c_result_t i2c_bus_reset(void) {
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return I2C_RECOVERY_OK;
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}
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#ifdef DEBUG_VERBOSE
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/**
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* @brief 扫描I2C总线，查找连接的设备
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*
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@@ -263,364 +262,391 @@ void i2c_scan(void) {
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while (usart_flag_get(I2C_DEBUG_UART, USART_FLAG_TC) == RESET) {}
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}
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}
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#endif
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i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]) {
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uint8_t state = I2C_STATE_START;
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i2c_state_t state = I2C_STATE_START;
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uint16_t timeout = 0;
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uint8_t i2c_timeout_flag = 0;
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uint8_t retry_count = 0;
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/* parameter validation */
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if (data == NULL || slave_addr > 0x7F) {
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return I2C_RESULT_INVALID_PARAM;
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}
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/* enable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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while (!(i2c_timeout_flag)) {
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while (retry_count < I2C_MAX_RETRY) {
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switch (state) {
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case I2C_STATE_START:
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/* i2c master sends start signal only when the bus is idle */
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timeout = 0;
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/* wait for bus to be idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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i2c_start_on_bus(I2C0);
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timeout = 0;
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state = I2C_STATE_SEND_ADDRESS;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c bus is busy in WRITE BYTE!\n");
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#endif
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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i2c_start_on_bus(I2C0);
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timeout = 0;
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state = I2C_STATE_SEND_ADDRESS;
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break;
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case I2C_STATE_SEND_ADDRESS:
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/* i2c master sends START signal successfully */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
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/* wait for start condition to be sent. SBSEND flag */
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while((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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i2c_master_addressing(I2C0, slave_addr << 1, I2C_TRANSMITTER);
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timeout = 0;
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state = I2C_STATE_CLEAR_ADDRESS;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends start signal timeout in WRITE BYTE!\n");
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#endif
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* send slave address */
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i2c_master_addressing(I2C0, slave_addr << 1, I2C_TRANSMITTER);
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timeout = 0;
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state = I2C_STATE_CLEAR_ADDRESS;
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break;
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case I2C_STATE_CLEAR_ADDRESS:
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/* address flag set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
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/* wait for address to be acknowledged.ADDSEND set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (!i2c_flag_get(I2C0, I2C_FLAG_AERR)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))
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{
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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timeout = 0;
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state = I2C_STATE_TRANSMIT_DATA;
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timeout =0;
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state = I2C_STATE_TRANSMIT_REG;
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break;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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timeout =0;
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#ifdef DEBUG_VERBOES
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printf("i2c master clears address flag timeout in WRITE BYTE!\n");
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printf("IIC write failed for Error Slave Address. \n");
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#endif
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return I2C_RESULT_NACK;
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}
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case I2C_STATE_TRANSMIT_REG:
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* send register address */
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i2c_data_transmit(I2C0, reg_addr);
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timeout = 0;
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state = I2C_STATE_TRANSMIT_DATA;
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break;
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case I2C_STATE_TRANSMIT_DATA:
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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/* send IIC register address */
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i2c_data_transmit(I2C0, reg_addr);
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timeout = 0;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends data timeout in WRITE BYTE!\n");
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#endif
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* wait until BTC bit is set */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
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/* send register MSB value */
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i2c_data_transmit(I2C0, data[0]);
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timeout = 0;
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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/* send register MSB value */
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i2c_data_transmit(I2C0, data[0]);
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timeout = 0;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends MSB data timeout in WRITE BYTE!\n");
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#endif
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* wait until BTC bit is set */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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/* send register LSB value */
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i2c_data_transmit(I2C0, data[1]);
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timeout = 0;
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state = I2C_STATE_STOP;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends LSB data timeout in WRITE BYTE!\n");
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#endif
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_stop_on_bus(I2C0);
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return I2C_RESULT_NACK;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_BERR) || i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
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// 可按需清标志
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i2c_stop_on_bus(I2C0);
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return I2C_RESULT_ERROR;
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}
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/* wait until BTC bit is set */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
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/* send register LSB value */
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i2c_data_transmit(I2C0, data[1]);
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timeout = 0;
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/* wait until BTC bit is set */
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while (!i2c_flag_get(I2C0, I2C_FLAG_BTC) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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state = I2C_STATE_STOP;
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timeout = 0;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends data timeout in WRITE BYTE!\n");
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#endif
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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state = I2C_STATE_STOP;
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break;
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case I2C_STATE_STOP:
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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timeout = 0;
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while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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timeout = 0;
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state = I2C_STATE_END;
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i2c_timeout_flag = I2C_OK;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends stop signal timeout in WRITE BYTE!\n");
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#endif
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* i2c master sends STOP signal successfully */
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/* success */
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return I2C_RESULT_SUCCESS;
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case I2C_STATE_ERROR:
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(I2C0);
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timeout = 0;
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while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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return I2C_RESULT_ERROR;
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}
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|
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
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i2c_flag_clear(I2C0, I2C_FLAG_BERR);
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i2c_flag_clear(I2C0, I2C_FLAG_LOSTARB);
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retry_count ++;
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if (retry_count >= I2C_MAX_RETRY)
|
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{
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#ifdef DEBUG_VERBOES
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printf("IIC write failed after %d retries\n", I2C_MAX_RETRY);
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#endif
|
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return I2C_RESULT_ERROR;
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}
|
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|
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/* reset state machine for retry */
|
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state = I2C_STATE_START;
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timeout = 0;
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||||
|
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/* small delay before retry */
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delay_10us(10);
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break;
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|
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default:
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state = I2C_STATE_START;
|
||||
i2c_timeout_flag = I2C_OK;
|
||||
timeout = 0;
|
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#ifdef DEBUG_VERBOES
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printf("i2c master sends start signal in WRITE BYTE.\n");
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#endif
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||||
break;
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||||
}
|
||||
}
|
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return I2C_RESULT_SUCCESS;
|
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return I2C_RESULT_TIMEOUT;
|
||||
}
|
||||
|
||||
i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data) {
|
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i2c_state_t state = I2C_STATE_START;
|
||||
uint16_t timeout = 0;
|
||||
uint8_t retry_count = 0;
|
||||
bool write_phase = true;
|
||||
|
||||
// 参数检查：防止空指针和非法地址
|
||||
if (data == NULL || slave_addr > 0x7F) {
|
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return I2C_RESULT_INVALID_PARAM;
|
||||
}
|
||||
|
||||
i2c_state_t state = I2C_STATE_START;
|
||||
bool read_cycle = false;
|
||||
bool i2c_timeout_flag = false;
|
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uint16_t timeout = 0;
|
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uint8_t number_of_byte = 2;
|
||||
|
||||
/* enable acknowledge */
|
||||
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||
|
||||
while (!(i2c_timeout_flag)) {
|
||||
while (retry_count < (uint8_t)I2C_MAX_RETRY) {
|
||||
switch (state) {
|
||||
case I2C_STATE_START:
|
||||
if (RESET == read_cycle) {
|
||||
/* i2c master sends start signal only when the bus is idle */
|
||||
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
/* whether to send ACK or not for the next byte */
|
||||
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
||||
} else {
|
||||
// i2c_bus_reset();
|
||||
timeout = 0;
|
||||
state = I2C_STATE_START;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c bus is busy in READ!\n");
|
||||
#endif
|
||||
}
|
||||
}
|
||||
/* send the start signal */
|
||||
i2c_start_on_bus(I2C0);
|
||||
timeout = 0;
|
||||
|
||||
// wait for bus to be idle
|
||||
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
// send start condition
|
||||
i2c_start_on_bus(I2C0);
|
||||
state = I2C_STATE_SEND_ADDRESS;
|
||||
timeout = 0;
|
||||
break;
|
||||
|
||||
case I2C_STATE_SEND_ADDRESS:
|
||||
/* i2c master sends START signal successfully */
|
||||
/* wait for start condition to be sent */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
if (RESET == read_cycle) {
|
||||
i2c_master_addressing(I2C0, slave_addr << 1, I2C_TRANSMITTER);
|
||||
state = I2C_STATE_CLEAR_ADDRESS;
|
||||
} else {
|
||||
i2c_master_addressing(I2C0, slave_addr << 1, I2C_RECEIVER);
|
||||
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||
state = I2C_STATE_CLEAR_ADDRESS;
|
||||
}
|
||||
timeout = 0;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_STATE_START;
|
||||
read_cycle = RESET;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends start signal timeout in READ!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
// send slave address
|
||||
if (write_phase) {
|
||||
/* write phase: send address with write bit */
|
||||
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_TRANSMITTER);
|
||||
} else {
|
||||
/* read phase: send address with read bit */
|
||||
i2c_master_addressing(I2C0, (slave_addr << 1) | 0x01, I2C_RECEIVER);
|
||||
}
|
||||
|
||||
state = I2C_STATE_CLEAR_ADDRESS;
|
||||
timeout = 0;
|
||||
break;
|
||||
|
||||
case I2C_STATE_CLEAR_ADDRESS:
|
||||
/* address flag set means i2c slave sends ACK */
|
||||
/* wait for address to be acknowledged */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
/* Check for NACK before clearing address flag */
|
||||
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
||||
/* NACK received - slave did not acknowledge address */
|
||||
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
||||
i2c_stop_on_bus(I2C0);
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c NACK received for address 0x%02X in read!\n", slave_addr);
|
||||
#endif
|
||||
return I2C_RESULT_NACK;
|
||||
}
|
||||
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (write_phase) {
|
||||
/* clear address flag (write phase) */
|
||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||
if ((SET == read_cycle) && (1 == number_of_byte)) {
|
||||
/* send a stop condition to I2C bus */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
}
|
||||
timeout = 0;
|
||||
state = I2C_STATE_TRANSMIT_DATA;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_STATE_START;
|
||||
read_cycle = RESET;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master clears address flag timeout in READ!\n");
|
||||
#endif
|
||||
/* READ phase for 2 bytes: set POS=NEXT and disable ACK BEFORE clearing ADDR */
|
||||
i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
|
||||
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||
|
||||
/* now clear address flag to release SCL and enter data phase */
|
||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||
|
||||
state = I2C_STATE_RECEIVE_DATA;
|
||||
}
|
||||
|
||||
timeout = 0;
|
||||
break;
|
||||
|
||||
case I2C_STATE_TRANSMIT_DATA:
|
||||
if (RESET == read_cycle) {
|
||||
/* wait until the transmit data buffer is empty */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
/* send the EEPROM's internal address to write to : only one byte address */
|
||||
i2c_data_transmit(I2C0, reg_addr);
|
||||
timeout = 0;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_STATE_START;
|
||||
read_cycle = RESET;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master wait data buffer is empty timeout in READ!\n");
|
||||
#endif
|
||||
}
|
||||
/* wait until BTC bit is set */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
timeout = 0;
|
||||
state = I2C_STATE_START;
|
||||
read_cycle = SET;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_STATE_START;
|
||||
read_cycle = RESET;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends register address timeout in READ!\n");
|
||||
#endif
|
||||
}
|
||||
} else {
|
||||
while (number_of_byte) {
|
||||
timeout++;
|
||||
if (2 == number_of_byte) {
|
||||
/* wait until BTC bit is set */
|
||||
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC));
|
||||
/* send a stop condition to I2C bus */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
}
|
||||
/* wait until RBNE bit is set */
|
||||
if (i2c_flag_get(I2C0, I2C_FLAG_RBNE)) {
|
||||
/* read a byte from the EEPROM */
|
||||
*data = i2c_data_receive(I2C0);
|
||||
/* point to the next location where the byte read will be saved */
|
||||
data++;
|
||||
/* decrement the read bytes counter */
|
||||
number_of_byte--;
|
||||
timeout = 0;
|
||||
}
|
||||
if (timeout > I2C_TIME_OUT) {
|
||||
timeout = 0;
|
||||
state = I2C_STATE_START;
|
||||
read_cycle = 0;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends data timeout in READ!\n");
|
||||
#endif
|
||||
}
|
||||
}
|
||||
timeout = 0;
|
||||
state = I2C_STATE_STOP;
|
||||
/* wait for transmit buffer to be empty */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* send register address */
|
||||
i2c_data_transmit(I2C0, reg_addr);
|
||||
state = I2C_STATE_RESTART;
|
||||
timeout = 0;
|
||||
break;
|
||||
|
||||
case I2C_STATE_RESTART:
|
||||
/* wait for byte transfer complete BTC: Bit Transfer Complete */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* generate repeated start condition */
|
||||
i2c_start_on_bus(I2C0);
|
||||
|
||||
/* wait for repeated start condition to be sent */
|
||||
timeout = 0;
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* send slave address with read bit (R/W bit is set by library) */
|
||||
i2c_master_addressing(I2C0, (slave_addr << 1), I2C_RECEIVER);
|
||||
|
||||
/* switch to read phase */
|
||||
write_phase = false;
|
||||
state = I2C_STATE_CLEAR_ADDRESS;
|
||||
timeout = 0;
|
||||
break;
|
||||
|
||||
case I2C_STATE_RECEIVE_DATA:
|
||||
/* Wait for BTC (both bytes received) */
|
||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Send STOP before reading the last two bytes */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
|
||||
/* Read the two bytes back-to-back */
|
||||
data[0] = i2c_data_receive(I2C0);
|
||||
data[1] = i2c_data_receive(I2C0);
|
||||
|
||||
state = I2C_STATE_STOP;
|
||||
break;
|
||||
|
||||
case I2C_STATE_STOP:
|
||||
/* i2c master sends STOP signal successfully */
|
||||
/* wait for stop condition to complete */
|
||||
while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
|
||||
timeout++;
|
||||
}
|
||||
if (timeout < I2C_TIME_OUT) {
|
||||
timeout = 0;
|
||||
state = I2C_STATE_END;
|
||||
i2c_timeout_flag = I2C_OK;
|
||||
} else {
|
||||
timeout = 0;
|
||||
state = I2C_STATE_START;
|
||||
read_cycle = 0;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends stop signal timeout in READ!\n");
|
||||
#endif
|
||||
if (timeout >= I2C_TIME_OUT) {
|
||||
state = I2C_STATE_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
/* i2c master sends STOP signal successfully */
|
||||
/* success */
|
||||
return I2C_RESULT_SUCCESS;
|
||||
|
||||
case I2C_STATE_ERROR:
|
||||
/* send stop condition to release bus */
|
||||
i2c_stop_on_bus(I2C0);
|
||||
|
||||
retry_count++;
|
||||
if (retry_count >= I2C_MAX_RETRY) {
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("IIC read failed after %d retries\n", I2C_RETRY_MAX);
|
||||
#endif
|
||||
return I2C_RESULT_ERROR;
|
||||
}
|
||||
|
||||
/* reset state machine for retry */
|
||||
state = I2C_STATE_START;
|
||||
write_phase = true;
|
||||
timeout = 0;
|
||||
|
||||
/* small delay before retry */
|
||||
delay_10us(10);
|
||||
break;
|
||||
|
||||
default:
|
||||
state = I2C_STATE_START;
|
||||
read_cycle = 0;
|
||||
i2c_timeout_flag = I2C_OK;
|
||||
timeout = 0;
|
||||
#ifdef DEBUG_VERBOES
|
||||
printf("i2c master sends start signal in READ.\n");
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
return I2C_RESULT_SUCCESS;
|
||||
return I2C_RESULT_TIMEOUT;
|
||||
}
|
||||
|
||||
#ifdef DEBUG_VERBOSE
|
||||
|
||||
Reference in New Issue
Block a user