generated from hulk/gd32e23x_template_cmake_vscode
rewrite write 16bits
This commit is contained in:
276
Src/i2c.c
276
Src/i2c.c
@@ -264,166 +264,193 @@ void i2c_scan(void) {
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}
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}
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i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]) {
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i2c_result_t i2c_write_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t data[2]) {
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uint8_t state = I2C_STATE_START;
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i2c_state_t state = I2C_STATE_START;
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uint16_t timeout = 0;
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uint16_t timeout = 0;
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uint8_t i2c_timeout_flag = 0;
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uint8_t retry_count = 0;
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/* parameter validation */
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/* parameter validation */
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if (data == NULL || slave_addr > 0x7F) {
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if (data == NULL || slave_addr > 0x7F) {
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return I2C_RESULT_INVALID_PARAM;
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return I2C_RESULT_INVALID_PARAM;
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}
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}
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/* enable acknowledge */
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while (retry_count < I2C_MAX_RETRY) {
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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while (!(i2c_timeout_flag)) {
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switch (state) {
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switch (state) {
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case I2C_STATE_START:
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case I2C_STATE_START:
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/* i2c master sends start signal only when the bus is idle */
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timeout = 0;
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/* wait for bus to be idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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timeout++;
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}
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}
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if (timeout < I2C_TIME_OUT) {
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if (timeout >= I2C_TIME_OUT) {
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i2c_start_on_bus(I2C0);
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state = I2C_STATE_ERROR;
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timeout = 0;
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break;
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state = I2C_STATE_SEND_ADDRESS;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c bus is busy in WRITE BYTE!\n");
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#endif
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}
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}
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i2c_start_on_bus(I2C0);
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timeout = 0;
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state = I2C_STATE_SEND_ADDRESS;
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break;
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break;
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case I2C_STATE_SEND_ADDRESS:
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case I2C_STATE_SEND_ADDRESS:
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/* i2c master sends START signal successfully */
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/* wait for start condition to be sent. SBSEND flag */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
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while((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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timeout++;
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}
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}
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if (timeout < I2C_TIME_OUT) {
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if (timeout >= I2C_TIME_OUT) {
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i2c_master_addressing(I2C0, slave_addr << 1, I2C_TRANSMITTER);
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state = I2C_STATE_ERROR;
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timeout = 0;
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break;
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state = I2C_STATE_CLEAR_ADDRESS;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends start signal timeout in WRITE BYTE!\n");
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#endif
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}
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}
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/* send slave address */
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i2c_master_addressing(I2C0, slave_addr << 1, I2C_TRANSMITTER);
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timeout = 0;
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state = I2C_STATE_CLEAR_ADDRESS;
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break;
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break;
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case I2C_STATE_CLEAR_ADDRESS:
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case I2C_STATE_CLEAR_ADDRESS:
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/* address flag set means i2c slave sends ACK */
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/* wait for address to be acknowledged.ADDSEND set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (!i2c_flag_get(I2C0, I2C_FLAG_AERR)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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timeout++;
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}
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}
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if (timeout < I2C_TIME_OUT) {
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))
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{
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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timeout = 0;
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timeout =0;
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state = I2C_STATE_TRANSMIT_DATA;
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state = I2C_STATE_TRANSMIT_REG;
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break;
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} else {
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} else {
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timeout = 0;
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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state = I2C_STATE_START;
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timeout =0;
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#ifdef DEBUG_VERBOES
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#ifdef DEBUG_VERBOES
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printf("i2c master clears address flag timeout in WRITE BYTE!\n");
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printf("IIC write failed for Error Slave Address. \n");
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#endif
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#endif
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return I2C_RESULT_NACK;
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}
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}
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case I2C_STATE_TRANSMIT_REG:
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_ERROR;
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break;
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}
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/* send register address */
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i2c_data_transmit(I2C0, reg_addr);
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timeout = 0;
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state = I2C_STATE_TRANSMIT_DATA;
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break;
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break;
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case I2C_STATE_TRANSMIT_DATA:
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case I2C_STATE_TRANSMIT_DATA:
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/* wait until the transmit data buffer is empty */
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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timeout++;
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}
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}
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if (timeout < I2C_TIME_OUT) {
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if (timeout >= I2C_TIME_OUT) {
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/* send IIC register address */
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state = I2C_STATE_ERROR;
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i2c_data_transmit(I2C0, reg_addr);
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break;
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timeout = 0;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends data timeout in WRITE BYTE!\n");
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#endif
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}
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}
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/* wait until BTC bit is set */
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/* send register MSB value */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
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i2c_data_transmit(I2C0, data[0]);
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timeout = 0;
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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timeout++;
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}
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}
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if (timeout < I2C_TIME_OUT) {
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if (timeout >= I2C_TIME_OUT) {
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/* send register MSB value */
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state = I2C_STATE_ERROR;
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i2c_data_transmit(I2C0, data[0]);
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break;
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timeout = 0;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends MSB data timeout in WRITE BYTE!\n");
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#endif
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}
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}
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/* wait until BTC bit is set */
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
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i2c_stop_on_bus(I2C0);
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timeout++;
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return I2C_RESULT_NACK;
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}
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} else if (i2c_flag_get(I2C0, I2C_FLAG_BERR) || i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
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if (timeout < I2C_TIME_OUT) {
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// 可按需清标志
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/* send register LSB value */
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i2c_stop_on_bus(I2C0);
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i2c_data_transmit(I2C0, data[1]);
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return I2C_RESULT_ERROR;
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timeout = 0;
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state = I2C_STATE_STOP;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends LSB data timeout in WRITE BYTE!\n");
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#endif
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}
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}
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/* wait until BTC bit is set */
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/* send register LSB value */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
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i2c_data_transmit(I2C0, data[1]);
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timeout = 0;
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/* wait until BTC bit is set */
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while (!i2c_flag_get(I2C0, I2C_FLAG_BTC) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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timeout++;
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}
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}
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if (timeout < I2C_TIME_OUT) {
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if (timeout >= I2C_TIME_OUT) {
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state = I2C_STATE_STOP;
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state = I2C_STATE_ERROR;
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timeout = 0;
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break;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends data timeout in WRITE BYTE!\n");
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#endif
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}
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}
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state = I2C_STATE_STOP;
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break;
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break;
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case I2C_STATE_STOP:
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case I2C_STATE_STOP:
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/* send a stop condition to I2C bus */
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(I2C0);
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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timeout = 0;
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while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
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while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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timeout++;
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}
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}
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if (timeout < I2C_TIME_OUT) {
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if (timeout >= I2C_TIME_OUT) {
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timeout = 0;
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state = I2C_STATE_ERROR;
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state = I2C_STATE_END;
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break;
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i2c_timeout_flag = I2C_OK;
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} else {
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timeout = 0;
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state = I2C_STATE_START;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends stop signal timeout in WRITE BYTE!\n");
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#endif
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}
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}
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/* i2c master sends STOP signal successfully */
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/* success */
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return I2C_RESULT_SUCCESS;
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case I2C_STATE_ERROR:
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(I2C0);
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timeout = 0;
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while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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}
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if (timeout >= I2C_TIME_OUT) {
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return I2C_RESULT_ERROR;
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}
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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i2c_flag_clear(I2C0, I2C_FLAG_BERR);
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i2c_flag_clear(I2C0, I2C_FLAG_LOSTARB);
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retry_count ++;
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if (retry_count >= I2C_MAX_RETRY)
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{
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#ifdef DEBUG_VERBOES
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printf("IIC write failed after %d retries\n", I2C_MAX_RETRY);
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#endif
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return I2C_RESULT_ERROR;
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}
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/* reset state machine for retry */
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state = I2C_STATE_START;
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timeout = 0;
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/* small delay before retry */
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delay_10us(10);
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break;
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break;
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default:
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default:
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state = I2C_STATE_START;
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state = I2C_STATE_START;
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i2c_timeout_flag = I2C_OK;
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timeout = 0;
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#ifdef DEBUG_VERBOES
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printf("i2c master sends start signal in WRITE BYTE.\n");
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#endif
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break;
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break;
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}
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}
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}
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}
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return I2C_RESULT_SUCCESS;
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return I2C_RESULT_TIMEOUT;
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}
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}
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i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data) {
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i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data) {
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@@ -431,7 +458,6 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
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uint16_t timeout = 0;
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uint16_t timeout = 0;
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uint8_t retry_count = 0;
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uint8_t retry_count = 0;
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bool write_phase = true;
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bool write_phase = true;
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uint8_t data_index = 0;
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// 参数检查:防止空指针和非法地址
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// 参数检查:防止空指针和非法地址
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if (data == NULL || slave_addr > 0x7F) {
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if (data == NULL || slave_addr > 0x7F) {
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@@ -494,18 +520,19 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
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break;
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break;
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}
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}
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/* clear address flag, address flag set means i2c slave sends ACK */
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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if (write_phase) {
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if (write_phase) {
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/* clear address flag (write phase) */
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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state = I2C_STATE_TRANSMIT_DATA;
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state = I2C_STATE_TRANSMIT_DATA;
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} else {
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} else {
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/* 读阶段:配置ACK位置和禁用ACK(针对2字节读取) */
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/* READ phase for 2 bytes: set POS=NEXT and disable ACK BEFORE clearing ADDR */
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i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
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i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT);
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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/* now clear address flag to release SCL and enter data phase */
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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state = I2C_STATE_RECEIVE_DATA;
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state = I2C_STATE_RECEIVE_DATA;
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data_index = 0;
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}
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}
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timeout = 0;
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timeout = 0;
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@@ -550,9 +577,9 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
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break;
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break;
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}
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}
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/* send slave address with read bit */
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/* send slave address with read bit (R/W bit is set by library) */
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i2c_master_addressing(I2C0, (slave_addr << 1) | 0x01, I2C_RECEIVER);
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i2c_master_addressing(I2C0, (slave_addr << 1), I2C_RECEIVER);
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/* switch to read phase */
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/* switch to read phase */
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write_phase = false;
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write_phase = false;
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state = I2C_STATE_CLEAR_ADDRESS;
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state = I2C_STATE_CLEAR_ADDRESS;
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@@ -560,7 +587,7 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
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break;
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break;
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case I2C_STATE_RECEIVE_DATA:
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case I2C_STATE_RECEIVE_DATA:
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/* 等待BTC标志表示第一个字节接收完成 */
|
/* Wait for BTC (both bytes received) */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
|
||||||
timeout++;
|
timeout++;
|
||||||
}
|
}
|
||||||
@@ -568,26 +595,14 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
state = I2C_STATE_ERROR;
|
state = I2C_STATE_ERROR;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* 发送STOP条件 */
|
/* Send STOP before reading the last two bytes */
|
||||||
i2c_stop_on_bus(I2C0);
|
i2c_stop_on_bus(I2C0);
|
||||||
|
|
||||||
/* 读取第一个字节 */
|
/* Read the two bytes back-to-back */
|
||||||
data[0] = i2c_data_receive(I2C0);
|
data[0] = i2c_data_receive(I2C0);
|
||||||
|
|
||||||
/* 等待第二个字节接收完成 */
|
|
||||||
timeout = 0;
|
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) && (timeout < I2C_TIME_OUT)) {
|
|
||||||
timeout++;
|
|
||||||
}
|
|
||||||
if (timeout >= I2C_TIME_OUT) {
|
|
||||||
state = I2C_STATE_ERROR;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* 读取第二个字节 */
|
|
||||||
data[1] = i2c_data_receive(I2C0);
|
data[1] = i2c_data_receive(I2C0);
|
||||||
|
|
||||||
state = I2C_STATE_STOP;
|
state = I2C_STATE_STOP;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -620,7 +635,6 @@ i2c_result_t i2c_read_16bits(uint8_t slave_addr, uint8_t reg_addr, uint8_t *data
|
|||||||
/* reset state machine for retry */
|
/* reset state machine for retry */
|
||||||
state = I2C_STATE_START;
|
state = I2C_STATE_START;
|
||||||
write_phase = true;
|
write_phase = true;
|
||||||
data_index = 0;
|
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
|
|
||||||
/* small delay before retry */
|
/* small delay before retry */
|
||||||
|
Reference in New Issue
Block a user